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| author | Evan Cheng <evan.cheng@apple.com> | 2009-07-23 18:26:03 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2009-07-23 18:26:03 +0000 |
| commit | 6683bb6a7d82f45a10742a914d3c7d0d30d8e753 (patch) | |
| tree | 6e331341437f903f1d5e545c8cd24962fb647873 /lib | |
| parent | 4d10add69d4b366dacaa7bb0ceb7db4ac61b4d3d (diff) | |
| download | external_llvm-6683bb6a7d82f45a10742a914d3c7d0d30d8e753.zip external_llvm-6683bb6a7d82f45a10742a914d3c7d0d30d8e753.tar.gz external_llvm-6683bb6a7d82f45a10742a914d3c7d0d30d8e753.tar.bz2 | |
Since we have moved unified assembly, switch to ADR instruction instead of a the difficult-to-read .set + add syntax to materialize pc-relative address.
Turns out this also fixed a poor code selection on Thumb1. I have no idea why we were using a mov + add to do the same thing as ADR before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76889 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/ARM/ARMInstrThumb.td | 21 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMInstrThumb2.td | 15 |
2 files changed, 8 insertions, 28 deletions
diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td index 3cc0edb..123b9c0 100644 --- a/lib/Target/ARM/ARMInstrThumb.td +++ b/lib/Target/ARM/ARMInstrThumb.td @@ -552,22 +552,11 @@ let usesCustomDAGSchedInserter = 1 in // Expanded by the scheduler. // tLEApcrel - Load a pc-relative address into a register without offending the // assembler. -let Defs = [CPSR] in { -def tLEApcrel : T1Ix2<(outs tGPR:$dst), (ins i32imm:$label), - !strconcat(!strconcat(".set ${:private}PCRELV${:uid}, ($label-(", - "${:private}PCRELL${:uid}+4))\n"), - !strconcat("\tmovs $dst, #${:private}PCRELV${:uid}\n", - "${:private}PCRELL${:uid}:\n\tadd $dst, pc")), - []>; - -def tLEApcrelJT : T1Ix2<(outs tGPR:$dst), (ins i32imm:$label, i32imm:$id), - !strconcat(!strconcat(".set ${:private}PCRELV${:uid}," - " (${label}_${id:no_hash}-(", - "${:private}PCRELL${:uid}+4))\n"), - !strconcat("\tmovs $dst, #${:private}PCRELV${:uid}\n", - "${:private}PCRELL${:uid}:\n\tadd $dst, pc")), - []>; -} +def tLEApcrel : T1I<(outs tGPR:$dst), (ins i32imm:$label), + "adr $dst, #$label", []>; + +def tLEApcrelJT : T1I<(outs tGPR:$dst), (ins i32imm:$label, i32imm:$id), + "adr $dst, #${label}_${id:no_hash}", []>; //===----------------------------------------------------------------------===// // TLS Instructions diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td index 80b0d68..5c0a47e 100644 --- a/lib/Target/ARM/ARMInstrThumb2.td +++ b/lib/Target/ARM/ARMInstrThumb2.td @@ -450,20 +450,11 @@ def t2PICADD : T2XI<(outs GPR:$dst), (ins GPR:$lhs, pclabel:$cp), // LEApcrel - Load a pc-relative address into a register without offending the // assembler. def t2LEApcrel : T2XI<(outs GPR:$dst), (ins i32imm:$label, pred:$p), - !strconcat(!strconcat(".set ${:private}PCRELV${:uid}, ($label-(", - "${:private}PCRELL${:uid}+8))\n"), - !strconcat("${:private}PCRELL${:uid}:\n\t", - "add$p $dst, pc, #${:private}PCRELV${:uid}")), - []>; + "adr$p $dst, #$label", []>; def t2LEApcrelJT : T2XI<(outs GPR:$dst), - (ins i32imm:$label, i32imm:$id, pred:$p), - !strconcat(!strconcat(".set ${:private}PCRELV${:uid}," - " (${label}_${id:no_hash}-(", - "${:private}PCRELL${:uid}+8))\n"), - !strconcat("${:private}PCRELL${:uid}:\n\t", - "add$p $dst, pc, #${:private}PCRELV${:uid}")), - []>; + (ins i32imm:$label, i32imm:$id, pred:$p), + "adr$p $dst, #${label}_${id:no_hash}", []>; // ADD rd, sp, #so_imm def t2ADDrSPi : T2XI<(outs GPR:$dst), (ins GPR:$sp, t2_so_imm:$imm), |