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authorBob Wilson <bob.wilson@apple.com>2010-06-07 23:48:46 +0000
committerBob Wilson <bob.wilson@apple.com>2010-06-07 23:48:46 +0000
commit66dc4e2acdc96990e73cfc1b8d0c2d5fa9619ae5 (patch)
treee834857f8fddbb5925070ddd51ac4b4059bbb6b9 /lib
parent4af55a91641e5dbf06ec1408c7ebf39ab59b594d (diff)
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Fix a mistake in my previous change r105437: don't access operand 2 and assume
that it is an immediate before checking that the instruction is an EXTRACT_SUBREG. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105585 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/CodeGen/TwoAddressInstructionPass.cpp5
1 files changed, 2 insertions, 3 deletions
diff --git a/lib/CodeGen/TwoAddressInstructionPass.cpp b/lib/CodeGen/TwoAddressInstructionPass.cpp
index 14c05fe..16588bf 100644
--- a/lib/CodeGen/TwoAddressInstructionPass.cpp
+++ b/lib/CodeGen/TwoAddressInstructionPass.cpp
@@ -1178,17 +1178,16 @@ TwoAddressInstructionPass::CoalesceExtSubRegs(SmallVector<unsigned,4> &Srcs,
UI = MRI->use_nodbg_begin(SrcReg),
UE = MRI->use_nodbg_end(); UI != UE; ++UI) {
MachineInstr *UseMI = &*UI;
- unsigned SubRegIdx = UseMI->getOperand(2).getImm();
// FIXME: For now require that the destination subregs match the subregs
// being extracted.
if (!UseMI->isExtractSubreg() ||
UseMI->getOperand(0).getReg() != DstReg ||
- UseMI->getOperand(0).getSubReg() != SubRegIdx ||
+ UseMI->getOperand(0).getSubReg() != UseMI->getOperand(2).getImm() ||
UseMI->getOperand(1).getSubReg() != 0) {
CanCoalesce = false;
break;
}
- SubIndices.push_back(SubRegIdx);
+ SubIndices.push_back(UseMI->getOperand(2).getImm());
}
if (!CanCoalesce || SubIndices.size() < 2)