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author | Chris Lattner <sabre@nondot.org> | 2008-02-21 20:54:31 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2008-02-21 20:54:31 +0000 |
commit | 69e6a8d5a8c486bcdd2c19238171b01d470ba45f (patch) | |
tree | cb33b63e6d3c6d6c8c456c9132393db06f42beef /lib | |
parent | 0fe71e9bb19ff1781813184e41a8aaaae4dd2908 (diff) | |
download | external_llvm-69e6a8d5a8c486bcdd2c19238171b01d470ba45f.zip external_llvm-69e6a8d5a8c486bcdd2c19238171b01d470ba45f.tar.gz external_llvm-69e6a8d5a8c486bcdd2c19238171b01d470ba45f.tar.bz2 |
Make the clobber analysis a bit more smart: we only are careful about
early clobbers if the clobber list contains a *register* not some thing
like {memory}, {dirflag} etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47457 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 16 |
1 files changed, 13 insertions, 3 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index e159c11..96dde98 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -3735,9 +3735,19 @@ void SelectionDAGLowering::visitInlineAsm(CallSite CS) { SawEarlyClobber |= OpInfo.isEarlyClobber; // If we see a clobber of a register, it is an early clobber. - if (OpInfo.Type == InlineAsm::isClobber && - OpInfo.ConstraintType == TargetLowering::C_Register) - SawEarlyClobber = true; + if (!SawEarlyClobber && + OpInfo.Type == InlineAsm::isClobber && + OpInfo.ConstraintType == TargetLowering::C_Register) { + // Note that we want to ignore things that we don't trick here, like + // dirflag, fpsr, flags, etc. + std::pair<unsigned, const TargetRegisterClass*> PhysReg = + TLI.getRegForInlineAsmConstraint(OpInfo.ConstraintCode, + OpInfo.ConstraintVT); + if (PhysReg.first || PhysReg.second) { + // This is a register we know of. + SawEarlyClobber = true; + } + } // If this is a memory input, and if the operand is not indirect, do what we // need to to provide an address for the memory input. |