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| author | Chris Lattner <sabre@nondot.org> | 2005-09-28 18:27:58 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2005-09-28 18:27:58 +0000 |
| commit | 6bcf1b7eed0fabed92298cedce0fcacdc55fdfd7 (patch) | |
| tree | cbded53a1655b645673589d63216da12ff8ecb4f /lib | |
| parent | 393e138f603d50a37425d625126491e314f3a9d0 (diff) | |
| download | external_llvm-6bcf1b7eed0fabed92298cedce0fcacdc55fdfd7.zip external_llvm-6bcf1b7eed0fabed92298cedce0fcacdc55fdfd7.tar.gz external_llvm-6bcf1b7eed0fabed92298cedce0fcacdc55fdfd7.tar.bz2 | |
expose commutativity information
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23498 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.td | 25 |
1 files changed, 17 insertions, 8 deletions
diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td index d774f84..18eaf34 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.td +++ b/lib/Target/PowerPC/PPCInstrInfo.td @@ -81,27 +81,36 @@ def SDTExtInreg : SDTypeProfile<1, 2, [ // sext_inreg SDTCisVTSmallerThanOp<2, 1> ]>; +//===----------------------------------------------------------------------===// +// Selection DAG Node Properties. +// +// Note: These are hard coded into tblgen. +// +class SDNodeProperty; +def SDNPCommutative : SDNodeProperty; //===----------------------------------------------------------------------===// // Selection DAG Node definitions. // -class SDNode<string opcode, SDTypeProfile typeprof, string sdclass = "SDNode"> { +class SDNode<string opcode, SDTypeProfile typeprof, + list<SDNodeProperty> props = [], string sdclass = "SDNode"> { string Opcode = opcode; string SDClass = sdclass; + list<SDNodeProperty> Properties = props; SDTypeProfile TypeProfile = typeprof; } def set; def node; -def imm : SDNode<"ISD::Constant" , SDTImm , "ConstantSDNode">; -def vt : SDNode<"ISD::VALUETYPE" , SDTVT , "VTSDNode">; -def and : SDNode<"ISD::AND" , SDTIntBinOp>; -def or : SDNode<"ISD::OR" , SDTIntBinOp>; -def xor : SDNode<"ISD::XOR" , SDTIntBinOp>; -def add : SDNode<"ISD::ADD" , SDTBinOp>; +def imm : SDNode<"ISD::Constant" , SDTImm , [], "ConstantSDNode">; +def vt : SDNode<"ISD::VALUETYPE" , SDTVT , [], "VTSDNode">; +def and : SDNode<"ISD::AND" , SDTIntBinOp, [SDNPCommutative]>; +def or : SDNode<"ISD::OR" , SDTIntBinOp, [SDNPCommutative]>; +def xor : SDNode<"ISD::XOR" , SDTIntBinOp, [SDNPCommutative]>; +def add : SDNode<"ISD::ADD" , SDTBinOp , [SDNPCommutative]>; def sub : SDNode<"ISD::SUB" , SDTBinOp>; -def mul : SDNode<"ISD::MUL" , SDTBinOp>; +def mul : SDNode<"ISD::MUL" , SDTBinOp , [SDNPCommutative]>; def sdiv : SDNode<"ISD::SDIV" , SDTBinOp>; def udiv : SDNode<"ISD::UDIV" , SDTIntBinOp>; def mulhs : SDNode<"ISD::MULHS" , SDTIntBinOp>; |