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author | Chris Lattner <sabre@nondot.org> | 2007-04-12 04:14:49 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2007-04-12 04:14:49 +0000 |
commit | 6c284d716ea1d81ba9206e48c7d2590e1b78e89e (patch) | |
tree | 5388f375f7ffa2517d842ab3987076272ecc3778 /lib | |
parent | 4e3e115e15aa4dfc8a74771a9194a9b044f40aa2 (diff) | |
download | external_llvm-6c284d716ea1d81ba9206e48c7d2590e1b78e89e.zip external_llvm-6c284d716ea1d81ba9206e48c7d2590e1b78e89e.tar.gz external_llvm-6c284d716ea1d81ba9206e48c7d2590e1b78e89e.tar.bz2 |
Fix mmx paddq, add support for the 'y' register class, though it isn't tested.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35940 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 0f97c24..dbdc132 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -321,6 +321,7 @@ X86TargetLowering::X86TargetLowering(TargetMachine &TM) setOperationAction(ISD::ADD, MVT::v8i8, Legal); setOperationAction(ISD::ADD, MVT::v4i16, Legal); setOperationAction(ISD::ADD, MVT::v2i32, Legal); + setOperationAction(ISD::ADD, MVT::v1i64, Legal); setOperationAction(ISD::SUB, MVT::v8i8, Legal); setOperationAction(ISD::SUB, MVT::v4i16, Legal); @@ -4636,7 +4637,10 @@ X86TargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint, else if (VT == MVT::i8) return std::make_pair(0U, X86::GR8RegisterClass); break; - // FIXME: not handling MMX registers yet ('y' constraint). + case 'y': // MMX_REGS if MMX allowed. + if (!Subtarget->hasMMX()) break; + return std::make_pair(0U, X86::VR64RegisterClass); + break; case 'Y': // SSE_REGS if SSE2 allowed if (!Subtarget->hasSSE2()) break; // FALL THROUGH. |