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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2013-08-20 09:22:54 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2013-08-20 09:22:54 +0000 |
| commit | 6ef333501eb917cbd79a51c84294051a1a257a0b (patch) | |
| tree | 9e1216f8c31498969893216f8ffc5d10b27d8a34 /lib | |
| parent | 7a4dd51e12ff5acea330800972eaa4a75ceea341 (diff) | |
| download | external_llvm-6ef333501eb917cbd79a51c84294051a1a257a0b.zip external_llvm-6ef333501eb917cbd79a51c84294051a1a257a0b.tar.gz external_llvm-6ef333501eb917cbd79a51c84294051a1a257a0b.tar.bz2 | |
[mips][msa] Added insve
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188777 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/Mips/MipsMSAInstrInfo.td | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/lib/Target/Mips/MipsMSAInstrInfo.td b/lib/Target/Mips/MipsMSAInstrInfo.td index 1657962..5a33d75 100644 --- a/lib/Target/Mips/MipsMSAInstrInfo.td +++ b/lib/Target/Mips/MipsMSAInstrInfo.td @@ -403,6 +403,11 @@ class INSERT_B_ENC : MSA_ELM_B_FMT<0b0100, 0b011001>; class INSERT_H_ENC : MSA_ELM_H_FMT<0b0100, 0b011001>; class INSERT_W_ENC : MSA_ELM_W_FMT<0b0100, 0b011001>; +class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>; +class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>; +class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>; +class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>; + class LD_B_ENC : MSA_I5_FMT<0b110, 0b00, 0b000111>; class LD_H_ENC : MSA_I5_FMT<0b110, 0b01, 0b000111>; class LD_W_ENC : MSA_I5_FMT<0b110, 0b10, 0b000111>; @@ -798,6 +803,19 @@ class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, string Constraints = "$wd = $wd_in"; } +class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode, + InstrItinClass itin, RegisterClass RCD, + RegisterClass RCWS> { + dag OutOperandList = (outs RCD:$wd); + dag InOperandList = (ins RCD:$wd_in, uimm6:$n, RCWS:$ws); + string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]"); + list<dag> Pattern = [(set RCD:$wd, (OpNode RCD:$wd_in, + immZExt6:$n, + RCWS:$ws))]; + InstrItinClass Itinerary = itin; + string Constraints = "$wd = $wd_in"; +} + class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode, InstrItinClass itin, RegisterClass RCWD, RegisterClass RCWS, RegisterClass RCWT = RCWS> { @@ -1490,6 +1508,15 @@ class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", int_mips_insert_h, class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", int_mips_insert_w, NoItinerary, MSA128, GPR32>; +class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b, + NoItinerary, MSA128, MSA128>; +class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h, + NoItinerary, MSA128, MSA128>; +class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w, + NoItinerary, MSA128, MSA128>; +class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d, + NoItinerary, MSA128, MSA128>; + class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode, ValueType TyNode, InstrItinClass itin, RegisterClass RCWD, Operand MemOpnd = mem, ComplexPattern Addr = addr> { @@ -2304,6 +2331,11 @@ def INSERT_B : INSERT_B_ENC, INSERT_B_DESC, Requires<[HasMSA]>; def INSERT_H : INSERT_H_ENC, INSERT_H_DESC, Requires<[HasMSA]>; def INSERT_W : INSERT_W_ENC, INSERT_W_DESC, Requires<[HasMSA]>; +def INSVE_B : INSVE_B_ENC, INSVE_B_DESC, Requires<[HasMSA]>; +def INSVE_H : INSVE_H_ENC, INSVE_H_DESC, Requires<[HasMSA]>; +def INSVE_W : INSVE_W_ENC, INSVE_W_DESC, Requires<[HasMSA]>; +def INSVE_D : INSVE_D_ENC, INSVE_D_DESC, Requires<[HasMSA]>; + def LD_B: LD_B_ENC, LD_B_DESC, Requires<[HasMSA]>; def LD_H: LD_H_ENC, LD_H_DESC, Requires<[HasMSA]>; def LD_W: LD_W_ENC, LD_W_DESC, Requires<[HasMSA]>; |