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authorEvan Cheng <evan.cheng@apple.com>2008-05-05 22:12:23 +0000
committerEvan Cheng <evan.cheng@apple.com>2008-05-05 22:12:23 +0000
commit71f489d72856a0424146a1e24642dfac3ae15522 (patch)
tree75bdaece262722413df3801e3586203d93f77f2c /lib
parentac178222067d726dafa3bf2ed1ae42e5af81911e (diff)
downloadexternal_llvm-71f489d72856a0424146a1e24642dfac3ae15522.zip
external_llvm-71f489d72856a0424146a1e24642dfac3ae15522.tar.gz
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Code clean up. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50675 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Target/X86/X86ISelLowering.cpp41
1 files changed, 21 insertions, 20 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 2df8af5..b0a7c78 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -6214,35 +6214,36 @@ static SDOperand PerformShuffleCombine(SDNode *N, SelectionDAG &DAG,
MVT::ValueType VT = N->getValueType(0);
MVT::ValueType EVT = MVT::getVectorElementType(VT);
SDOperand PermMask = N->getOperand(2);
- int NumElems = (int)PermMask.getNumOperands();
+ unsigned NumElems = PermMask.getNumOperands();
SDNode *Base = NULL;
- for (int i = 0; i < NumElems; ++i) {
- SDOperand Idx = PermMask.getOperand(i);
- if (Idx.getOpcode() == ISD::UNDEF) {
- if (!Base) return SDOperand();
- } else {
- SDOperand Arg =
- getShuffleScalarElt(N, cast<ConstantSDNode>(Idx)->getValue(), DAG);
- if (!Arg.Val || !ISD::isNON_EXTLoad(Arg.Val))
- return SDOperand();
+ for (unsigned i = 0; i < NumElems; ++i) {
+ SDOperand Elt = PermMask.getOperand(i);
+ if (Elt.getOpcode() == ISD::UNDEF) {
if (!Base)
- Base = Arg.Val;
- else if (!isConsecutiveLoad(Arg.Val, Base,
- i, MVT::getSizeInBits(EVT)/8,MFI))
return SDOperand();
+ continue;
+ }
+
+ unsigned Idx = cast<ConstantSDNode>(Elt)->getValue();
+ SDOperand Arg = getShuffleScalarElt(N, Idx, DAG);
+ if (!Arg.Val || !ISD::isNON_EXTLoad(Arg.Val))
+ return SDOperand();
+ if (!Base) {
+ Base = Arg.Val;
+ continue;
}
+
+ if (!isConsecutiveLoad(Arg.Val, Base, i, MVT::getSizeInBits(EVT)/8,MFI))
+ return SDOperand();
}
- bool isAlign16 = isBaseAlignment16(Base->getOperand(1).Val, MFI, Subtarget);
LoadSDNode *LD = cast<LoadSDNode>(Base);
- if (isAlign16) {
+ if (isBaseAlignment16(Base->getOperand(1).Val, MFI, Subtarget))
return DAG.getLoad(VT, LD->getChain(), LD->getBasePtr(), LD->getSrcValue(),
LD->getSrcValueOffset(), LD->isVolatile());
- } else {
- return DAG.getLoad(VT, LD->getChain(), LD->getBasePtr(), LD->getSrcValue(),
- LD->getSrcValueOffset(), LD->isVolatile(),
- LD->getAlignment());
- }
+ return DAG.getLoad(VT, LD->getChain(), LD->getBasePtr(), LD->getSrcValue(),
+ LD->getSrcValueOffset(), LD->isVolatile(),
+ LD->getAlignment());
}
/// PerformSELECTCombine - Do target-specific dag combines on SELECT nodes.