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authorChris Lattner <sabre@nondot.org>2010-11-14 22:56:43 +0000
committerChris Lattner <sabre@nondot.org>2010-11-14 22:56:43 +0000
commit749ba48fabc929ae39d750e39231919f2135a500 (patch)
tree5b817b3716502d6631927730b52c692e40158be6 /lib
parent142b531e024c7b814df74951b378b9e3e11d0d42 (diff)
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with the picbase nonsense starting to be figured out, implement
lowering support for MovePCtoLR[8]. Down to 4 failures again. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119090 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Target/PowerPC/PPCAsmPrinter.cpp22
1 files changed, 22 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCAsmPrinter.cpp b/lib/Target/PowerPC/PPCAsmPrinter.cpp
index 1d1ed67..c047af3 100644
--- a/lib/Target/PowerPC/PPCAsmPrinter.cpp
+++ b/lib/Target/PowerPC/PPCAsmPrinter.cpp
@@ -558,6 +558,28 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
// Lower multi-instruction pseudo operations.
switch (MI->getOpcode()) {
default: break;
+ case PPC::MovePCtoLR:
+ case PPC::MovePCtoLR8: {
+ // Transform %LR = MovePCtoLR
+ // Into this, where the label is the PIC base:
+ // bl L1$pb
+ // L1$pb:
+ MCSymbol *PICBase = MF->getPICBaseSymbol();
+
+ // Emit the 'bl'.
+ TmpInst.setOpcode(PPC::BL_Darwin); // Darwin vs SVR4 doesn't matter here.
+
+
+ // FIXME: We would like an efficient form for this, so we don't have to do
+ // a lot of extra uniquing.
+ TmpInst.addOperand(MCOperand::CreateExpr(MCSymbolRefExpr::
+ Create(PICBase, OutContext)));
+ OutStreamer.EmitInstruction(TmpInst);
+
+ // Emit the label.
+ OutStreamer.EmitLabel(PICBase);
+ return;
+ }
case PPC::LDtoc: {
// Transform %X3 = LDtoc <ga:@min1>, %X2
LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);