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| author | Daniel Dunbar <daniel@zuster.org> | 2009-08-11 22:24:40 +0000 |
|---|---|---|
| committer | Daniel Dunbar <daniel@zuster.org> | 2009-08-11 22:24:40 +0000 |
| commit | 75a0730447f4e62a6fda1f97fd78d7a368c5ef1e (patch) | |
| tree | c7f1d35e449414fe092721467163fc8459f89ebe /lib | |
| parent | 75dabac7cf3820b5463852b4404851a740fb3228 (diff) | |
| download | external_llvm-75a0730447f4e62a6fda1f97fd78d7a368c5ef1e.zip external_llvm-75a0730447f4e62a6fda1f97fd78d7a368c5ef1e.tar.gz external_llvm-75a0730447f4e62a6fda1f97fd78d7a368c5ef1e.tar.bz2 | |
X86/AsmParser: Mark MOV64GSrm, MOV64FSrm, GS_MOV32rm, FS_MOV32rm as codegen only.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78733 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/X86/X86Instr64bit.td | 4 | ||||
| -rw-r--r-- | lib/Target/X86/X86InstrInfo.td | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/X86/X86Instr64bit.td b/lib/Target/X86/X86Instr64bit.td index 9e0cea2..7eaf15d 100644 --- a/lib/Target/X86/X86Instr64bit.td +++ b/lib/Target/X86/X86Instr64bit.td @@ -1372,12 +1372,12 @@ def TLS_addr64 : I<0, Pseudo, (outs), (ins lea64mem:$sym), [(X86tlsaddr tls64addr:$sym)]>, Requires<[In64BitMode]>; -let AddedComplexity = 5 in +let AddedComplexity = 5, isCodeGenOnly = 1 in def MOV64GSrm : RI<0x8B, MRMSrcMem, (outs GR64:$dst), (ins i64mem:$src), "movq\t%gs:$src, $dst", [(set GR64:$dst, (gsload addr:$src))]>, SegGS; -let AddedComplexity = 5 in +let AddedComplexity = 5, isCodeGenOnly = 1 in def MOV64FSrm : RI<0x8B, MRMSrcMem, (outs GR64:$dst), (ins i64mem:$src), "movq\t%fs:$src, $dst", [(set GR64:$dst, (fsload addr:$src))]>, SegFS; diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index 8c80811..ecb1b20 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -3199,12 +3199,12 @@ def TLS_addr32 : I<0, Pseudo, (outs), (ins lea32mem:$sym), [(X86tlsaddr tls32addr:$sym)]>, Requires<[In32BitMode]>; -let AddedComplexity = 5 in +let AddedComplexity = 5, isCodeGenOnly = 1 in def GS_MOV32rm : I<0x8B, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$src), "movl\t%gs:$src, $dst", [(set GR32:$dst, (gsload addr:$src))]>, SegGS; -let AddedComplexity = 5 in +let AddedComplexity = 5, isCodeGenOnly = 1 in def FS_MOV32rm : I<0x8B, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$src), "movl\t%fs:$src, $dst", [(set GR32:$dst, (fsload addr:$src))]>, SegFS; |