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authorBill Wendling <isanbard@gmail.com>2007-10-02 21:49:31 +0000
committerBill Wendling <isanbard@gmail.com>2007-10-02 21:49:31 +0000
commit7687bd0b2bbff184586f0b4058b93d013a1ce508 (patch)
treee51982c645925fe502f3198e3b1960c7310e5864 /lib
parent2bb6d459e6efa4a5b36283ac02c9a8c388df3338 (diff)
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Another micro-opt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42554 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Target/X86/README.txt16
1 files changed, 16 insertions, 0 deletions
diff --git a/lib/Target/X86/README.txt b/lib/Target/X86/README.txt
index 81e9797..0fd79f2 100644
--- a/lib/Target/X86/README.txt
+++ b/lib/Target/X86/README.txt
@@ -1306,3 +1306,19 @@ However, ICC caches this information before the loop and produces this:
movl 88(%esp), %eax #481.12
//===---------------------------------------------------------------------===//
+
+This code:
+
+ %tmp659 = icmp slt i16 %tmp654, 0 ; <i1> [#uses=1]
+ br i1 %tmp659, label %cond_true662, label %cond_next715
+
+produces this:
+
+ testw %cx, %cx
+ movswl %cx, %esi
+ jns LBB4_109 # cond_next715
+
+Shark tells us that using %cx in the testw instruction is sub-optimal. It
+suggests using the 32-bit register (which is what ICC uses).
+
+//===---------------------------------------------------------------------===//