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authorChris Lattner <sabre@nondot.org>2010-02-11 22:39:10 +0000
committerChris Lattner <sabre@nondot.org>2010-02-11 22:39:10 +0000
commit7e85180d15c4d5a451fbc078f7194a41c6230a57 (patch)
tree40ad0af5702dbbc64ff14cc1225a5431c65c3b37 /lib
parent780679baa7008e54cb94f383c5b13ee995e21fe3 (diff)
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add a new MCInstPrinter::getOpcodeName interface, when it is
implemented, llvm-mc --show-inst now uses it to print the instruction opcode as well as the number. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95929 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/MC/MCAsmStreamer.cpp6
-rw-r--r--lib/MC/MCInstPrinter.cpp7
-rw-r--r--lib/Target/X86/X86MCCodeEmitter.cpp8
3 files changed, 17 insertions, 4 deletions
diff --git a/lib/MC/MCAsmStreamer.cpp b/lib/MC/MCAsmStreamer.cpp
index 2a8f168..6add1b4 100644
--- a/lib/MC/MCAsmStreamer.cpp
+++ b/lib/MC/MCAsmStreamer.cpp
@@ -617,6 +617,12 @@ void MCAsmStreamer::EmitInstruction(const MCInst &Inst) {
raw_ostream &OS = GetCommentOS();
OS << "<MCInst #" << Inst.getOpcode();
+ StringRef InstName;
+ if (InstPrinter)
+ InstName = InstPrinter->getOpcodeName(Inst.getOpcode());
+ if (!InstName.empty())
+ OS << ' ' << InstName;
+
for (unsigned i = 0, e = Inst.getNumOperands(); i != e; ++i) {
OS << "\n ";
Inst.getOperand(i).print(OS, &MAI);
diff --git a/lib/MC/MCInstPrinter.cpp b/lib/MC/MCInstPrinter.cpp
index e90c03c..92a7154 100644
--- a/lib/MC/MCInstPrinter.cpp
+++ b/lib/MC/MCInstPrinter.cpp
@@ -8,7 +8,14 @@
//===----------------------------------------------------------------------===//
#include "llvm/MC/MCInstPrinter.h"
+#include "llvm/ADT/StringRef.h"
using namespace llvm;
MCInstPrinter::~MCInstPrinter() {
}
+
+/// getOpcodeName - Return the name of the specified opcode enum (e.g.
+/// "MOV32ri") or empty if we can't resolve it.
+StringRef MCInstPrinter::getOpcodeName(unsigned Opcode) const {
+ return "";
+}
diff --git a/lib/Target/X86/X86MCCodeEmitter.cpp b/lib/Target/X86/X86MCCodeEmitter.cpp
index 15510e8..5d745d2 100644
--- a/lib/Target/X86/X86MCCodeEmitter.cpp
+++ b/lib/Target/X86/X86MCCodeEmitter.cpp
@@ -282,11 +282,11 @@ void X86MCCodeEmitter::EmitMemModRMByte(const MCInst &MI, unsigned Op,
/// size, and 3) use of X86-64 extended registers.
static unsigned DetermineREXPrefix(const MCInst &MI, unsigned TSFlags,
const TargetInstrDesc &Desc) {
- unsigned REX = 0;
+ // Pseudo instructions shouldn't get here.
+ assert((TSFlags & X86II::FormMask) != X86II::Pseudo &&
+ "Can't encode pseudo instrs");
- // Pseudo instructions do not need REX prefix byte.
- if ((TSFlags & X86II::FormMask) == X86II::Pseudo)
- return 0;
+ unsigned REX = 0;
if (TSFlags & X86II::REX_W)
REX |= 1 << 3;