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author | Nadav Rotem <nadav.rotem@intel.com> | 2012-07-16 18:34:53 +0000 |
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committer | Nadav Rotem <nadav.rotem@intel.com> | 2012-07-16 18:34:53 +0000 |
commit | 7ee0e5ae6093dba18ecc5eaafb91e8fa82f4c409 (patch) | |
tree | a0ea68dae4d656b5bdb1b54ffff831937a155665 /lib | |
parent | b1162b8d4be6680c9f2c9f3124ce279876e2bb15 (diff) | |
download | external_llvm-7ee0e5ae6093dba18ecc5eaafb91e8fa82f4c409.zip external_llvm-7ee0e5ae6093dba18ecc5eaafb91e8fa82f4c409.tar.gz external_llvm-7ee0e5ae6093dba18ecc5eaafb91e8fa82f4c409.tar.bz2 |
Make ComputeDemandedBits return a deterministic result when computing an AssertZext value.
In the added testcase the constant 55 was behind an AssertZext of type i1, and ComputeDemandedBits
reported that some of the bits were both known to be one and known to be zero.
Together with Michael Kuperstein <michael.m.kuperstein@intel.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160305 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 3947648..cfe7170 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -1965,6 +1965,7 @@ void SelectionDAG::ComputeMaskedBits(SDValue Op, APInt &KnownZero, APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); KnownZero |= (~InMask); + KnownOne &= (~KnownZero); return; } case ISD::FGETSIGN: |