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authorHal Finkel <hfinkel@anl.gov>2013-07-11 05:55:57 +0000
committerHal Finkel <hfinkel@anl.gov>2013-07-11 05:55:57 +0000
commit838a7fb1a3bc514f062a44565f6680b7aeee6a87 (patch)
treeb3ef0e128bae99eb9bd4f3a12228167160595774 /lib
parent2ebba647eab05aaf71f6a309f855720ab6f90c7f (diff)
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RegScavenger should not exclude undef uses
When computing currently-live registers, the register scavenger excludes undef uses. As a result, undef uses are ignored when computing the restore points of registers spilled into the emergency slots. While the register scavenger normally excludes from consideration, when scavenging, registers used by the current instruction, we need to not exclude undef uses. Otherwise, we might end up requiring more emergency spill slots than we have (in the case where the undef use *is* the currently-spilled register). Another bug found by llvm-stress. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186067 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/CodeGen/RegisterScavenging.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/CodeGen/RegisterScavenging.cpp b/lib/CodeGen/RegisterScavenging.cpp
index d1a945d..75ebdaa 100644
--- a/lib/CodeGen/RegisterScavenging.cpp
+++ b/lib/CodeGen/RegisterScavenging.cpp
@@ -368,7 +368,7 @@ unsigned RegScavenger::scavengeRegister(const TargetRegisterClass *RC,
// Exclude all the registers being used by the instruction.
for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
MachineOperand &MO = I->getOperand(i);
- if (MO.isReg() && MO.getReg() != 0 &&
+ if (MO.isReg() && MO.getReg() != 0 && !(MO.isUse() && MO.isUndef()) &&
!TargetRegisterInfo::isVirtualRegister(MO.getReg()))
Candidates.reset(MO.getReg());
}