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author | Nate Begeman <natebegeman@mac.com> | 2005-12-19 23:40:42 +0000 |
---|---|---|
committer | Nate Begeman <natebegeman@mac.com> | 2005-12-19 23:40:42 +0000 |
commit | 88276b887c426cf5d998b705a14663bfa38f8efd (patch) | |
tree | 257ad5f54eaa1f8550273321211e7460f15cc2a3 /lib | |
parent | 7fd1edd32e9a6782dbcd00818bbdaf82f14284a1 (diff) | |
download | external_llvm-88276b887c426cf5d998b705a14663bfa38f8efd.zip external_llvm-88276b887c426cf5d998b705a14663bfa38f8efd.tar.gz external_llvm-88276b887c426cf5d998b705a14663bfa38f8efd.tar.bz2 |
Fix a couple of the FIXMEs, thanks to suggestion from Chris. This allows
us to load and store vectors directly at a pointer (offset of zero) by
using r0 as the base register. This also requires some asm printer work
to satisfy the darwin assembler.
For
void %foo(<4 x float> * %a) {
entry:
%tmp1 = load <4 x float> * %a;
%tmp2 = add <4 x float> %tmp1, %tmp1
store <4 x float> %tmp2, <4 x float> *%a
ret void
}
We now produce:
_foo:
lvx v0, 0, r3
vaddfp v0, v0, v0
stvx v0, 0, r3
blr
Instead of:
_foo:
li r2, 0
lvx v0, r2, r3
vaddfp v0, v0, v0
stvx v0, r2, r3
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24872 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Target/PowerPC/PPCAsmPrinter.cpp | 9 | ||||
-rw-r--r-- | lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 6 |
2 files changed, 10 insertions, 5 deletions
diff --git a/lib/Target/PowerPC/PPCAsmPrinter.cpp b/lib/Target/PowerPC/PPCAsmPrinter.cpp index 9cf6863..717b831 100644 --- a/lib/Target/PowerPC/PPCAsmPrinter.cpp +++ b/lib/Target/PowerPC/PPCAsmPrinter.cpp @@ -189,7 +189,14 @@ namespace { O << ')'; } void printMemRegReg(const MachineInstr *MI, unsigned OpNo) { - printOperand(MI, OpNo); + // When used as the base register, r0 reads constant zero rather than + // the value contained in the register. For this reason, the darwin + // assembler requires that we print r0 as 0 (no r) when used as the base. + const MachineOperand &MO = MI->getOperand(OpNo); + if (MO.getReg() == PPC::R0) + O << '0'; + else + O << TM.getRegisterInfo()->get(MO.getReg()).Name; O << ", "; printOperand(MI, OpNo+1); } diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp index b9550f5..338be66 100644 --- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp +++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp @@ -454,8 +454,7 @@ bool PPCDAGToDAGISel::SelectAddrIdx(SDOperand N, SDOperand &Base, return true; } - // FIXME: This should be a CopyFromReg R0 rather than a load of 0. - Base = CurDAG->getTargetNode(PPC::LI, MVT::i32, getI32Imm(0)); + Base = CurDAG->getRegister(PPC::R0, MVT::i32); Index = Select(N); return true; } @@ -470,8 +469,7 @@ bool PPCDAGToDAGISel::SelectAddrIdxOnly(SDOperand N, SDOperand &Base, return true; } - // FIXME: This should be a CopyFromReg R0 rather than a load of 0. - Base = CurDAG->getTargetNode(PPC::LI, MVT::i32, getI32Imm(0)); + Base = CurDAG->getRegister(PPC::R0, MVT::i32); Index = Select(N); return true; } |