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authorEvan Cheng <evan.cheng@apple.com>2009-01-17 07:09:27 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-01-17 07:09:27 +0000
commit8e278266494c71471bfd7c29cccfcdcef433a4ba (patch)
treee017f922a0d29c74241a991522ce738c35f8d12b /lib
parent7ab24506746a25959b67caffa4b18d5fb62a60d2 (diff)
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Fix MatchAddress bug that's preventing negative displacement from being folded in 64-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62413 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Target/X86/X86ISelDAGToDAG.cpp27
1 files changed, 13 insertions, 14 deletions
diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp
index 44c43a2..842bb13 100644
--- a/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -817,7 +817,7 @@ bool X86DAGToDAGISel::MatchAddress(SDValue N, X86ISelAddressMode &AM,
AM.IndexReg = ShVal.getNode()->getOperand(0);
ConstantSDNode *AddVal =
cast<ConstantSDNode>(ShVal.getNode()->getOperand(1));
- uint64_t Disp = AM.Disp + (AddVal->getZExtValue() << Val);
+ uint64_t Disp = AM.Disp + (AddVal->getSExtValue() << Val);
if (!is64Bit || isInt32(Disp))
AM.Disp = Disp;
else
@@ -858,7 +858,7 @@ bool X86DAGToDAGISel::MatchAddress(SDValue N, X86ISelAddressMode &AM,
Reg = MulVal.getNode()->getOperand(0);
ConstantSDNode *AddVal =
cast<ConstantSDNode>(MulVal.getNode()->getOperand(1));
- uint64_t Disp = AM.Disp + AddVal->getZExtValue() *
+ uint64_t Disp = AM.Disp + AddVal->getSExtValue() *
CN->getZExtValue();
if (!is64Bit || isInt32(Disp))
AM.Disp = Disp;
@@ -874,19 +874,18 @@ bool X86DAGToDAGISel::MatchAddress(SDValue N, X86ISelAddressMode &AM,
}
break;
- case ISD::ADD:
- {
- X86ISelAddressMode Backup = AM;
- if (!MatchAddress(N.getNode()->getOperand(0), AM, false, Depth+1) &&
- !MatchAddress(N.getNode()->getOperand(1), AM, false, Depth+1))
- return false;
- AM = Backup;
- if (!MatchAddress(N.getNode()->getOperand(1), AM, false, Depth+1) &&
- !MatchAddress(N.getNode()->getOperand(0), AM, false, Depth+1))
- return false;
- AM = Backup;
- }
+ case ISD::ADD: {
+ X86ISelAddressMode Backup = AM;
+ if (!MatchAddress(N.getNode()->getOperand(0), AM, false, Depth+1) &&
+ !MatchAddress(N.getNode()->getOperand(1), AM, false, Depth+1))
+ return false;
+ AM = Backup;
+ if (!MatchAddress(N.getNode()->getOperand(1), AM, false, Depth+1) &&
+ !MatchAddress(N.getNode()->getOperand(0), AM, false, Depth+1))
+ return false;
+ AM = Backup;
break;
+ }
case ISD::OR:
// Handle "X | C" as "X + C" iff X is known to have C bits clear.