xcore TAI doesn't need TM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77868 91177308-0d34-0410-b5e6-96231b3b80d8

3 files changed, 3 insertions, 4 deletions

diff --git a/lib/Target/XCore/XCoreTargetAsmInfo.cpp b/lib/Target/XCore/XCoreTargetAsmInfo.cpp
index 6f2dbbb..a5bc6c2 100644
--- a/lib/Target/XCore/XCoreTargetAsmInfo.cpp
+++ b/lib/Target/XCore/XCoreTargetAsmInfo.cpp
@@ -10,7 +10,7 @@
 #include "XCoreTargetAsmInfo.h"
 using namespace llvm;
 
-XCoreTargetAsmInfo::XCoreTargetAsmInfo(const TargetMachine &TM) {
+XCoreTargetAsmInfo::XCoreTargetAsmInfo() {
   SupportsDebugInformation = true;
   Data16bitsDirective = "\t.short\t";
   Data32bitsDirective = "\t.long\t";
diff --git a/lib/Target/XCore/XCoreTargetAsmInfo.h b/lib/Target/XCore/XCoreTargetAsmInfo.h
index d1ceb3f..c4f71e4 100644
--- a/lib/Target/XCore/XCoreTargetAsmInfo.h
+++ b/lib/Target/XCore/XCoreTargetAsmInfo.h
@@ -17,10 +17,9 @@
 #include "llvm/Target/TargetAsmInfo.h"
 
 namespace llvm {
-  class TargetMachine;
   class XCoreTargetAsmInfo : public TargetAsmInfo {
   public:
-    explicit XCoreTargetAsmInfo(const TargetMachine &TM);
+    explicit XCoreTargetAsmInfo();
   };
 
 } // namespace llvm
diff --git a/lib/Target/XCore/XCoreTargetMachine.cpp b/lib/Target/XCore/XCoreTargetMachine.cpp
index faea960..eac8ca1 100644
--- a/lib/Target/XCore/XCoreTargetMachine.cpp
+++ b/lib/Target/XCore/XCoreTargetMachine.cpp
@@ -18,7 +18,7 @@
 using namespace llvm;
 
 const TargetAsmInfo *XCoreTargetMachine::createTargetAsmInfo() const {
-  return new XCoreTargetAsmInfo(*this);
+  return new XCoreTargetAsmInfo();
 }
 
 /// XCoreTargetMachine ctor - Create an ILP32 architecture model