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| author | Hal Finkel <hfinkel@anl.gov> | 2013-04-07 15:06:53 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2013-04-07 15:06:53 +0000 |
| commit | 946a811ef12188f4a129f4f98759fc9f7ba33d61 (patch) | |
| tree | a16655ce15cdcf940b55661f9d818b63fc8e0ecc /lib | |
| parent | 7ea2e4869496fb27876d35b93fe99397be29b978 (diff) | |
| download | external_llvm-946a811ef12188f4a129f4f98759fc9f7ba33d61.zip external_llvm-946a811ef12188f4a129f4f98759fc9f7ba33d61.tar.gz external_llvm-946a811ef12188f4a129f4f98759fc9f7ba33d61.tar.bz2 | |
PPC rotate instructions don't have unmodeled side effcts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178982 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/PowerPC/PPCInstr64Bit.td | 4 | ||||
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.td | 5 |
2 files changed, 6 insertions, 3 deletions
diff --git a/lib/Target/PowerPC/PPCInstr64Bit.td b/lib/Target/PowerPC/PPCInstr64Bit.td index 45beecd..5848291 100644 --- a/lib/Target/PowerPC/PPCInstr64Bit.td +++ b/lib/Target/PowerPC/PPCInstr64Bit.td @@ -495,6 +495,7 @@ def MULLD : XOForm_1<31, 233, 0, (outs G8RC:$rT), (ins G8RC:$rA, G8RC:$rB), [(set i64:$rT, (mul i64:$rA, i64:$rB))]>, isPPC64; +let neverHasSideEffects = 1 in { let isCommutable = 1 in { def RLDIMI : MDForm_1<30, 3, (outs G8RC:$rA), (ins G8RC:$rSi, G8RC:$rS, u6imm:$SH, u6imm:$MB), @@ -522,11 +523,12 @@ def RLWINM8 : MForm_2<21, "rlwinm $rA, $rS, $SH, $MB, $ME", IntGeneral, []>; -let isSelect = 1, neverHasSideEffects = 1 in +let isSelect = 1 in def ISEL8 : AForm_4<31, 15, (outs G8RC:$rT), (ins G8RC_NOX0:$rA, G8RC:$rB, CRBITRC:$cond), "isel $rT, $rA, $rB, $cond", IntGeneral, []>; +} // neverHasSideEffects = 1 } // End FXU Operations. diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td index 5853681..142abe1 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.td +++ b/lib/Target/PowerPC/PPCInstrInfo.td @@ -1554,8 +1554,9 @@ let Uses = [RM] in { } } +let neverHasSideEffects = 1 in { let PPC970_Unit = 1 in { // FXU Operations. - let isSelect = 1, neverHasSideEffects = 1 in + let isSelect = 1 in def ISEL : AForm_4<31, 15, (outs GPRC:$rT), (ins GPRC_NOR0:$rA, GPRC:$rB, CRBITRC:$cond), "isel $rT, $rA, $rB, $cond", IntGeneral, @@ -1586,7 +1587,7 @@ def RLWNM : MForm_2<23, "rlwnm $rA, $rS, $rB, $MB, $ME", IntGeneral, []>; } - +} // neverHasSideEffects = 1 //===----------------------------------------------------------------------===// // PowerPC Instruction Patterns |