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authorChris Lattner <sabre@nondot.org>2007-04-25 00:00:45 +0000
committerChris Lattner <sabre@nondot.org>2007-04-25 00:00:45 +0000
commit964dd860542aa12bea93474dc159b4a7e3a6a9c1 (patch)
tree1e195ba594b929f9566cfd0c3539119d97505efa /lib
parent3d4a548978e85d134a866a267de0d4a03b674d50 (diff)
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Be more careful about folding op(x, undef) when we have vector operands.
This fixes CodeGen/X86/2007-04-24-VectorCrash.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36413 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAG.cpp25
1 files changed, 16 insertions, 9 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index e3296aa..d1232f2 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -1294,13 +1294,8 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
double F;
uint64_t I;
} u1;
- union {
- double F;
- int64_t I;
- } u2;
u1.F = C1;
- u2.F = C2;
- if (u2.I < 0) // Sign bit of RHS set?
+ if (int64_t(DoubleToBits(C2)) < 0) // Sign bit of RHS set?
u1.I |= 1ULL << 63; // Set the sign bit of the LHS.
else
u1.I &= (1ULL << 63)-1; // Clear the sign bit of the LHS.
@@ -1336,7 +1331,11 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
case ISD::SREM:
case ISD::SRL:
case ISD::SHL:
- return getConstant(0, VT); // fold op(undef, arg2) -> 0
+ if (!MVT::isVector(VT))
+ return getConstant(0, VT); // fold op(undef, arg2) -> 0
+ // For vectors, we can't easily build an all zero vector, just return
+ // the LHS.
+ return N2;
}
}
}
@@ -1363,9 +1362,17 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
case ISD::AND:
case ISD::SRL:
case ISD::SHL:
- return getConstant(0, VT); // fold op(arg1, undef) -> 0
+ if (!MVT::isVector(VT))
+ return getConstant(0, VT); // fold op(arg1, undef) -> 0
+ // For vectors, we can't easily build an all zero vector, just return
+ // the LHS.
+ return N1;
case ISD::OR:
- return getConstant(MVT::getIntVTBitMask(VT), VT);
+ if (!MVT::isVector(VT))
+ return getConstant(MVT::getIntVTBitMask(VT), VT);
+ // For vectors, we can't easily build an all one vector, just return
+ // the LHS.
+ return N1;
case ISD::SRA:
return N1;
}