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authorEvan Cheng <evan.cheng@apple.com>2007-03-29 02:48:56 +0000
committerEvan Cheng <evan.cheng@apple.com>2007-03-29 02:48:56 +0000
commit974777868cfaaac6655ce00fae8bae0a000dd4a2 (patch)
tree66e17de602d98c955fe5fd8d566b8ff99c87f5bf /lib
parent01542f3d80b510fedfa6eb3c6c7696a7116d4acd (diff)
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New entries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35445 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/CodeGen/README.txt21
1 files changed, 21 insertions, 0 deletions
diff --git a/lib/CodeGen/README.txt b/lib/CodeGen/README.txt
index cd40895..aa5a54c 100644
--- a/lib/CodeGen/README.txt
+++ b/lib/CodeGen/README.txt
@@ -65,3 +65,24 @@ Some potential added complexities:
4. As stated in 3, not as simple as cloning in some cases. The target will have
to decide how to remat it. For example, an ARM 2-piece constant generation
instruction is remat'ed as a load from constantpool.
+
+//===---------------------------------------------------------------------===//
+
+bb27 ...
+ ...
+ %reg1037 = ADDri %reg1039, 1
+ %reg1038 = ADDrs %reg1032, %reg1039, %NOREG, 10
+ Successors according to CFG: 0x8b03bf0 (#5)
+
+bb76 (0x8b03bf0, LLVM BB @0x8b032d0, ID#5):
+ Predecessors according to CFG: 0x8b0c5f0 (#3) 0x8b0a7c0 (#4)
+ %reg1039 = PHI %reg1070, mbb<bb76.outer,0x8b0c5f0>, %reg1037, mbb<bb27,0x8b0a7c0>
+
+Note ADDri is not a two-address instruction. However, its result %reg1037 is an
+operand of the PHI node in bb76 and its operand %reg1039 is the result of the
+PHI node. We should treat it as a two-address code and make sure the ADDri is
+scheduled after any node that reads %reg1039.
+
+//===---------------------------------------------------------------------===//
+
+Re-Materialize load from frame index.