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authorEvan Cheng <evan.cheng@apple.com>2007-07-17 21:26:42 +0000
committerEvan Cheng <evan.cheng@apple.com>2007-07-17 21:26:42 +0000
commit9b8c67443280c8e1b50766b312a5c07df080a638 (patch)
tree7ec075bb1141c5f48e1b7fdafaf3c2c9a2778340 /lib
parent0af32251c7927f2c759495519afd8dbdb03140d5 (diff)
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Fold prologue esp update when possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39984 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Target/X86/X86RegisterInfo.cpp23
1 files changed, 22 insertions, 1 deletions
diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp
index 9278516..da65db0 100644
--- a/lib/Target/X86/X86RegisterInfo.cpp
+++ b/lib/Target/X86/X86RegisterInfo.cpp
@@ -1236,7 +1236,28 @@ void X86RegisterInfo::emitPrologue(MachineFunction &MF) const {
MBB.insert(MBBI, MI);
}
} else {
- emitSPUpdate(MBB, MBBI, StackPtr, -(int64_t)NumBytes, Is64Bit, TII);
+ // If there is an ADD32ri or SUB32ri of ESP immediately after this
+ // instruction, merge the two instructions.
+ if (MBBI != MBB.end()) {
+ MachineBasicBlock::iterator NI = next(MBBI);
+ unsigned Opc = MBBI->getOpcode();
+ if ((Opc == X86::ADD64ri32 || Opc == X86::ADD64ri8 ||
+ Opc == X86::ADD32ri || Opc == X86::ADD32ri8) &&
+ MBBI->getOperand(0).getReg() == StackPtr) {
+ NumBytes -= MBBI->getOperand(2).getImm();
+ MBB.erase(MBBI);
+ MBBI = NI;
+ } else if ((Opc == X86::SUB64ri32 || Opc == X86::SUB64ri8 ||
+ Opc == X86::SUB32ri || Opc == X86::SUB32ri8) &&
+ MBBI->getOperand(0).getReg() == StackPtr) {
+ NumBytes += MBBI->getOperand(2).getImm();
+ MBB.erase(MBBI);
+ MBBI = NI;
+ }
+ }
+
+ if (NumBytes)
+ emitSPUpdate(MBB, MBBI, StackPtr, -(int64_t)NumBytes, Is64Bit, TII);
}
}