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authorAnton Korobeynikov <asl@math.spbu.ru>2010-01-04 10:31:54 +0000
committerAnton Korobeynikov <asl@math.spbu.ru>2010-01-04 10:31:54 +0000
commita087db3a32dc3b04c3922714600cb563101fb6d4 (patch)
tree4224eeb781677a0afdeb521a63715f5edea7d9d6 /lib
parent5fc7cfe7150382b8f201f119440c6390de992840 (diff)
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Fix invalid chain folding for memory variant of sdiv / udiv
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92472 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Target/SystemZ/SystemZISelDAGToDAG.cpp52
1 files changed, 26 insertions, 26 deletions
diff --git a/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp b/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
index d64611d..f3189a8 100644
--- a/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
+++ b/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
@@ -643,16 +643,16 @@ SDNode *SystemZDAGToDAGISel::Select(SDValue Op) {
EVT ResVT;
bool is32Bit = false;
switch (NVT.getSimpleVT().SimpleTy) {
- default: assert(0 && "Unsupported VT!");
- case MVT::i32:
- Opc = SystemZ::SDIVREM32r; MOpc = SystemZ::SDIVREM32m;
- ResVT = MVT::v2i64;
- is32Bit = true;
- break;
- case MVT::i64:
- Opc = SystemZ::SDIVREM64r; MOpc = SystemZ::SDIVREM64m;
- ResVT = MVT::v2i64;
- break;
+ default: assert(0 && "Unsupported VT!");
+ case MVT::i32:
+ Opc = SystemZ::SDIVREM32r; MOpc = SystemZ::SDIVREM32m;
+ ResVT = MVT::v2i64;
+ is32Bit = true;
+ break;
+ case MVT::i64:
+ Opc = SystemZ::SDIVREM64r; MOpc = SystemZ::SDIVREM64m;
+ ResVT = MVT::v2i64;
+ break;
}
SDValue Tmp0, Tmp1, Tmp2;
@@ -677,10 +677,10 @@ SDNode *SystemZDAGToDAGISel::Select(SDValue Op) {
SDValue DivVal = SDValue(Dividend, 0);
if (foldedLoad) {
SDValue Ops[] = { DivVal, Tmp0, Tmp1, Tmp2, N1.getOperand(0) };
- Result = CurDAG->getMachineNode(MOpc, dl, ResVT,
+ Result = CurDAG->getMachineNode(MOpc, dl, ResVT, MVT::Other,
Ops, array_lengthof(Ops));
// Update the chain.
- ReplaceUses(N1.getValue(1), SDValue(Result, 0));
+ ReplaceUses(N1.getValue(1), SDValue(Result, 1));
} else {
Result = CurDAG->getMachineNode(Opc, dl, ResVT, SDValue(Dividend, 0), N1);
}
@@ -729,18 +729,18 @@ SDNode *SystemZDAGToDAGISel::Select(SDValue Op) {
bool is32Bit = false;
switch (NVT.getSimpleVT().SimpleTy) {
- default: assert(0 && "Unsupported VT!");
- case MVT::i32:
- Opc = SystemZ::UDIVREM32r; MOpc = SystemZ::UDIVREM32m;
- ClrOpc = SystemZ::MOV64Pr0_even;
- ResVT = MVT::v2i32;
- is32Bit = true;
- break;
- case MVT::i64:
- Opc = SystemZ::UDIVREM64r; MOpc = SystemZ::UDIVREM64m;
- ClrOpc = SystemZ::MOV128r0_even;
- ResVT = MVT::v2i64;
- break;
+ default: assert(0 && "Unsupported VT!");
+ case MVT::i32:
+ Opc = SystemZ::UDIVREM32r; MOpc = SystemZ::UDIVREM32m;
+ ClrOpc = SystemZ::MOV64Pr0_even;
+ ResVT = MVT::v2i32;
+ is32Bit = true;
+ break;
+ case MVT::i64:
+ Opc = SystemZ::UDIVREM64r; MOpc = SystemZ::UDIVREM64m;
+ ClrOpc = SystemZ::MOV128r0_even;
+ ResVT = MVT::v2i64;
+ break;
}
SDValue Tmp0, Tmp1, Tmp2;
@@ -767,10 +767,10 @@ SDNode *SystemZDAGToDAGISel::Select(SDValue Op) {
SDNode *Result;
if (foldedLoad) {
SDValue Ops[] = { DivVal, Tmp0, Tmp1, Tmp2, N1.getOperand(0) };
- Result = CurDAG->getMachineNode(MOpc, dl,ResVT,
+ Result = CurDAG->getMachineNode(MOpc, dl, ResVT, MVT::Other,
Ops, array_lengthof(Ops));
// Update the chain.
- ReplaceUses(N1.getValue(1), SDValue(Result, 0));
+ ReplaceUses(N1.getValue(1), SDValue(Result, 1));
} else {
Result = CurDAG->getMachineNode(Opc, dl, ResVT, DivVal, N1);
}