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author | Lauro Ramos Venancio <lauro.venancio@gmail.com> | 2007-03-20 20:09:03 +0000 |
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committer | Lauro Ramos Venancio <lauro.venancio@gmail.com> | 2007-03-20 20:09:03 +0000 |
commit | a0a26b7454ae6e7a729b4a47ee1b1e37c7c71858 (patch) | |
tree | 73be8588b1574f079e849938a44b08dd237e0076 /lib | |
parent | 29a68fb5b733119dd8295a4f7c7d069b9f78f0a3 (diff) | |
download | external_llvm-a0a26b7454ae6e7a729b4a47ee1b1e37c7c71858.zip external_llvm-a0a26b7454ae6e7a729b4a47ee1b1e37c7c71858.tar.gz external_llvm-a0a26b7454ae6e7a729b4a47ee1b1e37c7c71858.tar.bz2 |
Code clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35220 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/CodeGen/SelectionDAG/ScheduleDAG.cpp | 43 |
1 files changed, 20 insertions, 23 deletions
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp index 10a8586..262549a 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp @@ -381,6 +381,20 @@ void ScheduleDAG::AddOperand(MachineInstr *MI, SDOperand Op, } +// Returns the Register Class of a physical register +static const TargetRegisterClass *getPhysicalRegisterRegClass( + const MRegisterInfo *MRI, + MVT::ValueType VT, + unsigned reg) { + assert(MRegisterInfo::isPhysicalRegister(reg) && + "reg must be a physical register"); + // Pick the register class of the right type that contains this physreg. + for (MRegisterInfo::regclass_iterator I = MRI->regclass_begin(), + E = MRI->regclass_end(); I != E; ++I) + if ((*I)->hasType(VT) && (*I)->contains(reg)) + return *I; + assert(false && "Couldn't find the register class"); +} /// EmitNode - Generate machine code for an node and needed dependencies. /// @@ -478,20 +492,12 @@ void ScheduleDAG::EmitNode(SDNode *Node, if (InReg != DestReg) {// Coalesced away the copy? const TargetRegisterClass *TRC = 0; // Get the target register class - if (MRegisterInfo::isVirtualRegister(InReg)) { + if (MRegisterInfo::isVirtualRegister(InReg)) TRC = RegMap->getRegClass(InReg); - } else { - // Pick the register class of the right type that contains this - // physreg. - for (MRegisterInfo::regclass_iterator I = MRI->regclass_begin(), - E = MRI->regclass_end(); I != E; ++I) - if ((*I)->hasType(Node->getOperand(2).getValueType()) && - (*I)->contains(InReg)) { - TRC = *I; - break; - } - assert(TRC && "Couldn't find register class for reg copy!"); - } + else + TRC = getPhysicalRegisterRegClass(MRI, + Node->getOperand(2).getValueType(), + InReg); MRI->copyRegToReg(*BB, BB->end(), DestReg, InReg, TRC); } break; @@ -523,17 +529,8 @@ void ScheduleDAG::EmitNode(SDNode *Node, if (VRBase) { TRC = RegMap->getRegClass(VRBase); } else { + TRC = getPhysicalRegisterRegClass(MRI, Node->getValueType(0), SrcReg); - // Pick the register class of the right type that contains this physreg. - for (MRegisterInfo::regclass_iterator I = MRI->regclass_begin(), - E = MRI->regclass_end(); I != E; ++I) - if ((*I)->hasType(Node->getValueType(0)) && - (*I)->contains(SrcReg)) { - TRC = *I; - break; - } - assert(TRC && "Couldn't find register class for reg copy!"); - // Create the reg, emit the copy. VRBase = RegMap->createVirtualRegister(TRC); } |