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| author | Evan Cheng <evan.cheng@apple.com> | 2006-11-09 02:22:54 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2006-11-09 02:22:54 +0000 |
| commit | a1fd6504aaf62b87530e8230517957bad3facc96 (patch) | |
| tree | fb88ec42cf63d8dd4e2fe981e9c9feb3763e59d2 /lib | |
| parent | dd2b95534f866ec6f31df101624a715612c97ffa (diff) | |
| download | external_llvm-a1fd6504aaf62b87530e8230517957bad3facc96.zip external_llvm-a1fd6504aaf62b87530e8230517957bad3facc96.tar.gz external_llvm-a1fd6504aaf62b87530e8230517957bad3facc96.tar.bz2 | |
Remove M_2_ADDR_FLAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31583 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/CodeGen/TwoAddressInstructionPass.cpp | 2 | ||||
| -rw-r--r-- | lib/Target/X86/X86CodeEmitter.cpp | 7 | ||||
| -rw-r--r-- | lib/Target/X86/X86RegisterInfo.cpp | 7 |
3 files changed, 9 insertions, 7 deletions
diff --git a/lib/CodeGen/TwoAddressInstructionPass.cpp b/lib/CodeGen/TwoAddressInstructionPass.cpp index 50599c8..dbc50d6 100644 --- a/lib/CodeGen/TwoAddressInstructionPass.cpp +++ b/lib/CodeGen/TwoAddressInstructionPass.cpp @@ -191,8 +191,6 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) { mbbi->erase(mi); // Nuke the old inst. mi = New; ++NumConvertedTo3Addr; - assert(!TII.isTwoAddrInstr(New->getOpcode()) && - "convertToThreeAddress returned a 2-addr instruction??"); // Done with this instruction. break; } diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp index 8d1e912..80a285e 100644 --- a/lib/Target/X86/X86CodeEmitter.cpp +++ b/lib/Target/X86/X86CodeEmitter.cpp @@ -470,7 +470,8 @@ unsigned Emitter::determineREX(const MachineInstr &MI) { REX |= 1 << 3; if (MI.getNumOperands()) { - bool isTwoAddr = (Desc.Flags & M_2_ADDR_FLAG) != 0; + bool isTwoAddr = II->getNumOperands(Opcode) > 1 && + II->getOperandConstraint(Opcode, 1, TargetInstrInfo::TIED_TO) != -1; // If it accesses SPL, BPL, SIL, or DIL, then it requires a 0x40 REX prefix. bool isTrunc8 = isX86_64TruncToByte(Opcode); @@ -607,7 +608,9 @@ void Emitter::emitInstruction(const MachineInstr &MI) { // If this is a two-address instruction, skip one of the register operands. unsigned CurOp = 0; - CurOp += (Desc.Flags & M_2_ADDR_FLAG) != 0; + if (II->getNumOperands(Opcode) > 1 && + II->getOperandConstraint(Opcode, 1, TargetInstrInfo::TIED_TO) != -1) + CurOp++; unsigned char BaseOpcode = II->getBaseOpcodeFor(Opcode); switch (Desc.TSFlags & X86II::FormMask) { diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp index aa3ed30..45eae67 100644 --- a/lib/Target/X86/X86RegisterInfo.cpp +++ b/lib/Target/X86/X86RegisterInfo.cpp @@ -284,14 +284,15 @@ MachineInstr* X86RegisterInfo::foldMemoryOperand(MachineInstr *MI, const TableEntry *OpcodeTablePtr = NULL; unsigned OpcodeTableSize = 0; bool isTwoAddrFold = false; + bool isTwoAddr = TII.getNumOperands(MI->getOpcode()) > 1 && + TII.getOperandConstraint(MI->getOpcode(), 1,TargetInstrInfo::TIED_TO) != -1; // Folding a memory location into the two-address part of a two-address // instruction is different than folding it other places. It requires // replacing the *two* registers with the memory location. - if (MI->getNumOperands() >= 2 && MI->getOperand(0).isReg() && + if (isTwoAddr && MI->getNumOperands() >= 2 && MI->getOperand(0).isReg() && MI->getOperand(1).isReg() && i < 2 && - MI->getOperand(0).getReg() == MI->getOperand(1).getReg() && - TII.isTwoAddrInstr(MI->getOpcode())) { + MI->getOperand(0).getReg() == MI->getOperand(1).getReg()) { static const TableEntry OpcodeTable[] = { { X86::ADC32ri, X86::ADC32mi }, { X86::ADC32ri8, X86::ADC32mi8 }, |