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author | Dan Gohman <gohman@apple.com> | 2009-03-23 16:23:01 +0000 |
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committer | Dan Gohman <gohman@apple.com> | 2009-03-23 16:23:01 +0000 |
commit | a5c8ae233ebaef270b8fa96565ca7bf4fdcb3e15 (patch) | |
tree | 3435374b0f7ea970c815952354f8101c9e30d6de /lib | |
parent | 3974667c1a6d48686e92f85bc4463bb239af7442 (diff) | |
download | external_llvm-a5c8ae233ebaef270b8fa96565ca7bf4fdcb3e15.zip external_llvm-a5c8ae233ebaef270b8fa96565ca7bf4fdcb3e15.tar.gz external_llvm-a5c8ae233ebaef270b8fa96565ca7bf4fdcb3e15.tar.bz2 |
Fix canClobberPhysRegDefs to check all SDNodes grouped together
in an SUnit, instead of just the first one. This fix is needed
by some upcoming scheduler changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67531 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp | 33 |
1 files changed, 19 insertions, 14 deletions
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp index 7ae56d7..8e44997 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp @@ -1199,21 +1199,26 @@ static bool canClobberPhysRegDefs(const SUnit *SuccSU, const SUnit *SU, unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); const unsigned *ImpDefs = TII->get(N->getMachineOpcode()).getImplicitDefs(); assert(ImpDefs && "Caller should check hasPhysRegDefs"); - const unsigned *SUImpDefs = - TII->get(SU->getNode()->getMachineOpcode()).getImplicitDefs(); - if (!SUImpDefs) - return false; - for (unsigned i = NumDefs, e = N->getNumValues(); i != e; ++i) { - MVT VT = N->getValueType(i); - if (VT == MVT::Flag || VT == MVT::Other) + for (const SDNode *SUNode = SU->getNode(); SUNode; + SUNode = SUNode->getFlaggedNode()) { + if (!SUNode->isMachineOpcode()) continue; - if (!N->hasAnyUseOfValue(i)) - continue; - unsigned Reg = ImpDefs[i - NumDefs]; - for (;*SUImpDefs; ++SUImpDefs) { - unsigned SUReg = *SUImpDefs; - if (TRI->regsOverlap(Reg, SUReg)) - return true; + const unsigned *SUImpDefs = + TII->get(SUNode->getMachineOpcode()).getImplicitDefs(); + if (!SUImpDefs) + return false; + for (unsigned i = NumDefs, e = N->getNumValues(); i != e; ++i) { + MVT VT = N->getValueType(i); + if (VT == MVT::Flag || VT == MVT::Other) + continue; + if (!N->hasAnyUseOfValue(i)) + continue; + unsigned Reg = ImpDefs[i - NumDefs]; + for (;*SUImpDefs; ++SUImpDefs) { + unsigned SUReg = *SUImpDefs; + if (TRI->regsOverlap(Reg, SUReg)) + return true; + } } } return false; |