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authorBill Wendling <isanbard@gmail.com>2008-11-25 08:19:22 +0000
committerBill Wendling <isanbard@gmail.com>2008-11-25 08:19:22 +0000
commita6af91ae124d0713cfabcea8c5f508091dd7a556 (patch)
tree7cea45055b4aa0fb8a5a090d08ce0f866bf1652c /lib
parent7ebfea41755c1f7b45fe5cad005ad2ea701c508e (diff)
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Now with the correct type for the 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60016 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/CodeGen/SelectionDAG/LegalizeDAG.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index 563f84b..0a15715 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -4185,7 +4185,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
SDValue Sum = DAG.getNode(ISD::ADD, LHS.getValueType(), LHS, RHS);
MVT OType = Node->getValueType(1);
- SDValue Zero = DAG.getConstant(0, OType);
+ SDValue Zero = DAG.getConstant(0, LHS.getValueType());
SDValue LHSPos = DAG.getSetCC(OType, LHS, Zero, ISD::SETGE);
SDValue RHSPos = DAG.getSetCC(OType, RHS, Zero, ISD::SETGE);