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author | Evan Cheng <evan.cheng@apple.com> | 2008-02-02 04:07:54 +0000 |
---|---|---|
committer | Evan Cheng <evan.cheng@apple.com> | 2008-02-02 04:07:54 +0000 |
commit | a844bdeab31ef04221e7ef59a8467893584cc14d (patch) | |
tree | 0536e06ef73d25184c28dd72de26a26cfda1a4d1 /lib | |
parent | 1cf47cb21728c84342b15d9695b8a2433b3315a2 (diff) | |
download | external_llvm-a844bdeab31ef04221e7ef59a8467893584cc14d.zip external_llvm-a844bdeab31ef04221e7ef59a8467893584cc14d.tar.gz external_llvm-a844bdeab31ef04221e7ef59a8467893584cc14d.tar.bz2 |
SDIsel processes llvm.dbg.declare by recording the variable debug information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc.
Added ISD::DECLARE node type to represent llvm.dbg.declare intrinsic. Now the intrinsic calls are lowered into a SDNode and lives on through out the codegen passes.
For now, since all the debugging information recording is done at isel time, when a ISD::DECLARE node is selected, it has the side effect of also recording the variable. This is a short term solution that should be fixed in time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46659 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/CodeGen/AsmPrinter.cpp | 6 | ||||
-rw-r--r-- | lib/CodeGen/MachineModuleInfo.cpp | 18 | ||||
-rw-r--r-- | lib/CodeGen/PrologEpilogInserter.cpp | 7 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 13 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/ScheduleDAG.cpp | 1 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 12 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 10 | ||||
-rw-r--r-- | lib/Target/ARM/ARMISelDAGToDAG.cpp | 1 | ||||
-rw-r--r-- | lib/Target/Alpha/AlphaISelDAGToDAG.cpp | 1 | ||||
-rw-r--r-- | lib/Target/CellSPU/SPUISelDAGToDAG.cpp | 1 | ||||
-rw-r--r-- | lib/Target/IA64/IA64ISelDAGToDAG.cpp | 1 | ||||
-rw-r--r-- | lib/Target/Mips/MipsISelDAGToDAG.cpp | 1 | ||||
-rw-r--r-- | lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 1 | ||||
-rw-r--r-- | lib/Target/Sparc/SparcISelDAGToDAG.cpp | 1 | ||||
-rw-r--r-- | lib/Target/Target.td | 9 | ||||
-rw-r--r-- | lib/Target/X86/X86ISelDAGToDAG.cpp | 1 | ||||
-rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 6 |
17 files changed, 72 insertions, 18 deletions
diff --git a/lib/CodeGen/AsmPrinter.cpp b/lib/CodeGen/AsmPrinter.cpp index 2acf287..eac5743 100644 --- a/lib/CodeGen/AsmPrinter.cpp +++ b/lib/CodeGen/AsmPrinter.cpp @@ -1289,6 +1289,12 @@ void AsmPrinter::printLabel(unsigned Id) const { O << "\n" << TAI->getPrivateGlobalPrefix() << "label" << Id << ":\n"; } +/// printDeclare - This method prints a local variable declaration used by +/// debug tables. +void AsmPrinter::printDeclare(const MachineInstr *MI) const { + O << "\n"; +} + /// PrintAsmOperand - Print the specified operand of MI, an INLINEASM /// instruction, using the specified assembler variant. Targets should /// overried this to format as appropriate. diff --git a/lib/CodeGen/MachineModuleInfo.cpp b/lib/CodeGen/MachineModuleInfo.cpp index 5edeefb..6d285bd 100644 --- a/lib/CodeGen/MachineModuleInfo.cpp +++ b/lib/CodeGen/MachineModuleInfo.cpp @@ -1471,6 +1471,14 @@ bool DIVerifier::Verify(GlobalVariable *GV) { return true; } +/// isVerified - Return true if the specified GV has already been +/// verified as a debug information descriptor. +bool DIVerifier::isVerified(GlobalVariable *GV) { + unsigned &ValiditySlot = Validity[GV]; + if (ValiditySlot) return ValiditySlot == Valid; + return false; +} + //===----------------------------------------------------------------------===// DebugScope::~DebugScope() { @@ -1554,12 +1562,6 @@ DebugInfoDesc *MachineModuleInfo::getDescFor(Value *V) { return DR.Deserialize(V); } -/// Verify - Verify that a Value is debug information descriptor. -/// -bool MachineModuleInfo::Verify(Value *V) { - return VR.Verify(V); -} - /// AnalyzeModule - Scan the module for global debug information. /// void MachineModuleInfo::AnalyzeModule(Module &M) { @@ -1657,8 +1659,8 @@ unsigned MachineModuleInfo::RecordRegionEnd(Value *V) { /// RecordVariable - Indicate the declaration of a local variable. /// -void MachineModuleInfo::RecordVariable(Value *V, unsigned FrameIndex) { - VariableDesc *VD = cast<VariableDesc>(DR.Deserialize(V)); +void MachineModuleInfo::RecordVariable(GlobalValue *GV, unsigned FrameIndex) { + VariableDesc *VD = cast<VariableDesc>(DR.Deserialize(GV)); DebugScope *Scope = getOrCreateScope(VD->getContext()); DebugVariable *DV = new DebugVariable(VD, FrameIndex); Scope->AddVariable(DV); diff --git a/lib/CodeGen/PrologEpilogInserter.cpp b/lib/CodeGen/PrologEpilogInserter.cpp index 41efbef..f30d7d4 100644 --- a/lib/CodeGen/PrologEpilogInserter.cpp +++ b/lib/CodeGen/PrologEpilogInserter.cpp @@ -513,9 +513,9 @@ void PEI::replaceFrameIndices(MachineFunction &Fn) { for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) { MachineInstr *MI = I; - // Remember how much SP has been adjustment to create the call frame. if (I->getOpcode() == FrameSetupOpcode || I->getOpcode() == FrameDestroyOpcode) { + // Remember how much SP has been adjustment to create the call frame. int Size = I->getOperand(0).getImm(); if ((!StackGrowsDown && I->getOpcode() == FrameSetupOpcode) || (StackGrowsDown && I->getOpcode() == FrameDestroyOpcode)) @@ -526,7 +526,10 @@ void PEI::replaceFrameIndices(MachineFunction &Fn) { // Visit the instructions created by eliminateCallFramePseudoInstr(). I = next(PrevI); MI = NULL; - } else { + } else if (I->getOpcode() == TargetInstrInfo::DECLARE) + // Ignore it. + I++; + else { I++; for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) if (MI->getOperand(i).isFrameIndex()) { diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index fc726e4..4749b76 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -1085,6 +1085,19 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { break; } break; + + case ISD::DECLARE: + assert(Node->getNumOperands() == 3 && "Invalid DECLARE node!"); + switch (TLI.getOperationAction(ISD::DECLARE, MVT::Other)) { + default: assert(0 && "This action is not supported yet!"); + case TargetLowering::Legal: + Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. + Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the address. + Tmp3 = LegalizeOp(Node->getOperand(2)); // Legalize the variable. + Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Tmp3); + break; + } + break; case ISD::DEBUG_LOC: assert(Node->getNumOperands() == 4 && "Invalid DEBUG_LOC node!"); diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp index 3ecd623..a165b17 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp @@ -736,6 +736,7 @@ void ScheduleDAG::EmitNode(SDNode *Node, unsigned InstanceNo, case ISD::EntryToken: // fall thru case ISD::TokenFactor: case ISD::LABEL: + case ISD::DECLARE: break; case ISD::CopyToReg: { unsigned InReg; diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 6f0e98d..afb4647 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -20,6 +20,7 @@ #include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/CodeGen/MachineConstantPool.h" #include "llvm/CodeGen/MachineFrameInfo.h" +#include "llvm/CodeGen/MachineModuleInfo.h" #include "llvm/Support/MathExtras.h" #include "llvm/Target/MRegisterInfo.h" #include "llvm/Target/TargetData.h" @@ -1620,6 +1621,16 @@ unsigned SelectionDAG::ComputeNumSignBits(SDOperand Op, unsigned Depth) const{ } +bool SelectionDAG::isVerifiedDebugInfoDesc(SDOperand Op) const { + GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); + if (!GA) return false; + GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); + if (!GV) return false; + MachineModuleInfo *MMI = getMachineModuleInfo(); + return MMI && MMI->hasDebugInfo() && MMI->isVerified(GV); +} + + /// getNode - Gets or creates the specified node. /// SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT) { @@ -3700,6 +3711,7 @@ std::string SDNode::getOperationName(const SelectionDAG *G) const { case ISD::MERGE_VALUES: return "merge_values"; case ISD::INLINEASM: return "inlineasm"; case ISD::LABEL: return "label"; + case ISD::DECLARE: return "declare"; case ISD::HANDLENODE: return "handlenode"; case ISD::FORMAL_ARGUMENTS: return "formal_arguments"; case ISD::CALL: return "call"; diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index 2d88387..55231f3 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -2663,12 +2663,10 @@ SelectionDAGLowering::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) { case Intrinsic::dbg_declare: { MachineModuleInfo *MMI = DAG.getMachineModuleInfo(); DbgDeclareInst &DI = cast<DbgDeclareInst>(I); - if (MMI && DI.getVariable() && MMI->Verify(DI.getVariable())) { - SDOperand AddressOp = getValue(DI.getAddress()); - if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(AddressOp)) - MMI->RecordVariable(DI.getVariable(), FI->getIndex()); - } - + Value *Variable = DI.getVariable(); + if (MMI && Variable && MMI->Verify(Variable)) + DAG.setRoot(DAG.getNode(ISD::DECLARE, MVT::Other, getRoot(), + getValue(DI.getAddress()), getValue(Variable))); return 0; } diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp index ff29900..56bbce7 100644 --- a/lib/Target/ARM/ARMISelDAGToDAG.cpp +++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp @@ -23,6 +23,7 @@ #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineInstrBuilder.h" +#include "llvm/CodeGen/MachineModuleInfo.h" #include "llvm/CodeGen/SelectionDAG.h" #include "llvm/CodeGen/SelectionDAGISel.h" #include "llvm/Target/TargetLowering.h" diff --git a/lib/Target/Alpha/AlphaISelDAGToDAG.cpp b/lib/Target/Alpha/AlphaISelDAGToDAG.cpp index 0490f88..2962891 100644 --- a/lib/Target/Alpha/AlphaISelDAGToDAG.cpp +++ b/lib/Target/Alpha/AlphaISelDAGToDAG.cpp @@ -18,6 +18,7 @@ #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineFunction.h" +#include "llvm/CodeGen/MachineModuleInfo.h" #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/SelectionDAG.h" #include "llvm/CodeGen/SelectionDAGISel.h" diff --git a/lib/Target/CellSPU/SPUISelDAGToDAG.cpp b/lib/Target/CellSPU/SPUISelDAGToDAG.cpp index 8bde663..488c4e5 100644 --- a/lib/Target/CellSPU/SPUISelDAGToDAG.cpp +++ b/lib/Target/CellSPU/SPUISelDAGToDAG.cpp @@ -20,6 +20,7 @@ #include "llvm/CodeGen/MachineConstantPool.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/MachineFunction.h" +#include "llvm/CodeGen/MachineModuleInfo.h" #include "llvm/CodeGen/SelectionDAG.h" #include "llvm/CodeGen/SelectionDAGISel.h" #include "llvm/Target/TargetOptions.h" diff --git a/lib/Target/IA64/IA64ISelDAGToDAG.cpp b/lib/Target/IA64/IA64ISelDAGToDAG.cpp index 338733a..d8e308a 100644 --- a/lib/Target/IA64/IA64ISelDAGToDAG.cpp +++ b/lib/Target/IA64/IA64ISelDAGToDAG.cpp @@ -18,6 +18,7 @@ #include "IA64ISelLowering.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/MachineFunction.h" +#include "llvm/CodeGen/MachineModuleInfo.h" #include "llvm/CodeGen/SelectionDAG.h" #include "llvm/CodeGen/SelectionDAGISel.h" #include "llvm/Target/TargetOptions.h" diff --git a/lib/Target/Mips/MipsISelDAGToDAG.cpp b/lib/Target/Mips/MipsISelDAGToDAG.cpp index b2ad666..88e66fc 100644 --- a/lib/Target/Mips/MipsISelDAGToDAG.cpp +++ b/lib/Target/Mips/MipsISelDAGToDAG.cpp @@ -27,6 +27,7 @@ #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineInstrBuilder.h" +#include "llvm/CodeGen/MachineModuleInfo.h" #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/SelectionDAGISel.h" #include "llvm/Target/TargetMachine.h" diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp index 09fef25..2227921 100644 --- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp +++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp @@ -20,6 +20,7 @@ #include "PPCHazardRecognizers.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/MachineFunction.h" +#include "llvm/CodeGen/MachineModuleInfo.h" #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/SelectionDAG.h" #include "llvm/CodeGen/SelectionDAGISel.h" diff --git a/lib/Target/Sparc/SparcISelDAGToDAG.cpp b/lib/Target/Sparc/SparcISelDAGToDAG.cpp index f8dfbe3..0d7f40b 100644 --- a/lib/Target/Sparc/SparcISelDAGToDAG.cpp +++ b/lib/Target/Sparc/SparcISelDAGToDAG.cpp @@ -19,6 +19,7 @@ #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineInstrBuilder.h" +#include "llvm/CodeGen/MachineModuleInfo.h" #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/SelectionDAG.h" #include "llvm/CodeGen/SelectionDAGISel.h" diff --git a/lib/Target/Target.td b/lib/Target/Target.td index 4b1ab28..a2669dc 100644 --- a/lib/Target/Target.td +++ b/lib/Target/Target.td @@ -339,8 +339,15 @@ def LABEL : Instruction { let Namespace = "TargetInstrInfo"; let hasCtrlDep = 1; } +def DECLARE : Instruction { + let OutOperandList = (ops); + let InOperandList = (ops variable_ops); + let AsmString = ""; + let Namespace = "TargetInstrInfo"; + let hasCtrlDep = 1; +} def EXTRACT_SUBREG : Instruction { - let OutOperandList = (ops variable_ops); + let OutOperandList = (ops variable_ops); let InOperandList = (ops variable_ops); let AsmString = ""; let Namespace = "TargetInstrInfo"; diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp index c51cd80..5fc6c5e 100644 --- a/lib/Target/X86/X86ISelDAGToDAG.cpp +++ b/lib/Target/X86/X86ISelDAGToDAG.cpp @@ -29,6 +29,7 @@ #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineInstrBuilder.h" +#include "llvm/CodeGen/MachineModuleInfo.h" #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/SelectionDAGISel.h" #include "llvm/Target/TargetMachine.h" diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index b19456e..1093ea8 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -30,6 +30,7 @@ #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineInstrBuilder.h" +#include "llvm/CodeGen/MachineModuleInfo.h" #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/SelectionDAG.h" #include "llvm/Support/MathExtras.h" @@ -279,7 +280,7 @@ X86TargetLowering::X86TargetLowering(TargetMachine &TM) setOperationAction(ISD::MEMSET , MVT::Other, Custom); setOperationAction(ISD::MEMCPY , MVT::Other, Custom); - // Use the default ISD::LOCATION expansion. + // Use the default ISD::LOCATION, ISD::DECLARE expansion. setOperationAction(ISD::LOCATION, MVT::Other, Expand); // FIXME - use subtarget debug flags if (!Subtarget->isTargetDarwin() && @@ -3769,6 +3770,9 @@ SDOperand X86TargetLowering::LowerGlobalAddress(SDOperand Op, SelectionDAG &DAG) { GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal(); SDOperand Result = DAG.getTargetGlobalAddress(GV, getPointerTy()); + // If it's a debug information descriptor, don't mess with it. + if (DAG.isVerifiedDebugInfoDesc(Op)) + return Result; Result = DAG.getNode(X86ISD::Wrapper, getPointerTy(), Result); // With PIC, the address is actually $g + Offset. if (getTargetMachine().getRelocationModel() == Reloc::PIC_ && |