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authorReid Spencer <rspencer@reidspencer.com>2007-01-08 16:17:51 +0000
committerReid Spencer <rspencer@reidspencer.com>2007-01-08 16:17:51 +0000
commitac8cdf79e7b08c5a5be8efab7750835d5a57b2bc (patch)
treebf4a828c3d4a8709e0a7d731befd93a0e61a04a8 /lib
parentfbe7ae9e3c3b1adf9c053d898d023338568475f3 (diff)
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For PR1097:
Enable complex addressing modes on 64-bit platforms involving two induction variables by keeping a size and scale in 64-bits not 32. Patch by Dan Gohman. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33011 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Transforms/Scalar/LoopStrengthReduce.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Transforms/Scalar/LoopStrengthReduce.cpp b/lib/Transforms/Scalar/LoopStrengthReduce.cpp
index 53fa9e2..798fb81 100644
--- a/lib/Transforms/Scalar/LoopStrengthReduce.cpp
+++ b/lib/Transforms/Scalar/LoopStrengthReduce.cpp
@@ -893,7 +893,7 @@ unsigned LoopStrengthReduce::CheckForIVReuse(const SCEVHandle &Stride,
if (unsigned(abs(SInt)) < Scale || (SInt % Scale) != 0)
continue;
std::map<SCEVHandle, IVsOfOneStride>::iterator SI =
- IVsByStride.find(SCEVUnknown::getIntegerSCEV(SInt/Scale, Type::Int32Ty));
+ IVsByStride.find(SCEVUnknown::getIntegerSCEV(SInt/Scale, UIntPtrTy));
if (SI == IVsByStride.end())
continue;
for (std::vector<IVExpr>::iterator II = SI->second.IVs.begin(),