aboutsummaryrefslogtreecommitdiffstats
path: root/lib
diff options
context:
space:
mode:
authorDuncan Sands <baldrick@free.fr>2008-06-16 08:14:38 +0000
committerDuncan Sands <baldrick@free.fr>2008-06-16 08:14:38 +0000
commitad205a76871b5112a4bf70edca0df9d03b92de49 (patch)
tree8062be5018d4dc0b7c8cce2cf922b5226a41fdd4 /lib
parent7a15391c8dad7d4ff265b6b8f5aa6bcc50107c7a (diff)
downloadexternal_llvm-ad205a76871b5112a4bf70edca0df9d03b92de49.zip
external_llvm-ad205a76871b5112a4bf70edca0df9d03b92de49.tar.gz
external_llvm-ad205a76871b5112a4bf70edca0df9d03b92de49.tar.bz2
Allow these transforms for types like i256 while
still excluding types like i1 (not byte sized) and i120 (loading an i120 requires loading an i64, an i32, an i16 and an i8, which is expensive). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52310 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/CodeGen/SelectionDAG/DAGCombiner.cpp14
1 files changed, 6 insertions, 8 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 462a384..9db9879 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -1787,10 +1787,9 @@ SDOperand DAGCombiner::visitAND(SDNode *N) {
EVT = MVT::getIntegerVT(ActiveBits);
MVT LoadedVT = LN0->getMemoryVT();
- // Do not generate loads of extended integer types since these can be
- // expensive (and would be wrong if the type is not byte sized).
- if (EVT != MVT::Other && LoadedVT.bitsGT(EVT) && EVT.isSimple() &&
- EVT.isByteSized() && // Exclude MVT::i1, which is simple.
+ // Do not generate loads of non-round integer types since these can
+ // be expensive (and would be wrong if the type is not byte sized).
+ if (EVT != MVT::Other && LoadedVT.bitsGT(EVT) && EVT.isRound() &&
(!AfterLegalize || TLI.isLoadXLegal(ISD::ZEXTLOAD, EVT))) {
MVT PtrType = N0.getOperand(1).getValueType();
// For big endian targets, we need to add an offset to the pointer to
@@ -3187,10 +3186,9 @@ SDOperand DAGCombiner::ReduceLoadWidth(SDNode *N) {
}
}
- // Do not generate loads of extended integer types since these can be
- // expensive (and would be wrong if the type is not byte sized).
- if (ISD::isNON_EXTLoad(N0.Val) && N0.hasOneUse() && VT.isSimple() &&
- VT.isByteSized() && // Exclude MVT::i1, which is simple.
+ // Do not generate loads of non-round integer types since these can
+ // be expensive (and would be wrong if the type is not byte sized).
+ if (ISD::isNON_EXTLoad(N0.Val) && N0.hasOneUse() && VT.isRound() &&
// Do not change the width of a volatile load.
!cast<LoadSDNode>(N0)->isVolatile()) {
assert(N0.getValueType().getSizeInBits() > EVTBits &&