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authorEvan Cheng <evan.cheng@apple.com>2009-09-21 04:32:32 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-09-21 04:32:32 +0000
commitb0f5973bee566269f41d1cc21b7a1d3bede1d837 (patch)
tree66a3bdf56afb04183c366e8821b05ee9f61fb407 /lib
parentcc1c702f628d93f9d84b681059e16652ad09d595 (diff)
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Fix PR4986. "r1024 = insert_subreg r1024, undef, 2" cannot be turned in an implicit_def. Instead, it's an identity copy so it should be eliminated. Also make sure to update livevariable kill information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82436 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/CodeGen/LiveIntervalAnalysis.cpp33
1 files changed, 23 insertions, 10 deletions
diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp
index c690ac3..abab1ee 100644
--- a/lib/CodeGen/LiveIntervalAnalysis.cpp
+++ b/lib/CodeGen/LiveIntervalAnalysis.cpp
@@ -109,18 +109,15 @@ void LiveIntervals::releaseMemory() {
}
static bool CanTurnIntoImplicitDef(MachineInstr *MI, unsigned Reg,
- const TargetInstrInfo *tii_) {
+ unsigned OpIdx, const TargetInstrInfo *tii_){
unsigned SrcReg, DstReg, SrcSubReg, DstSubReg;
if (tii_->isMoveInstr(*MI, SrcReg, DstReg, SrcSubReg, DstSubReg) &&
Reg == SrcReg)
return true;
- if ((MI->getOpcode() == TargetInstrInfo::INSERT_SUBREG ||
- MI->getOpcode() == TargetInstrInfo::SUBREG_TO_REG) &&
- MI->getOperand(2).getReg() == Reg)
+ if (OpIdx == 2 && MI->getOpcode() == TargetInstrInfo::SUBREG_TO_REG)
return true;
- if (MI->getOpcode() == TargetInstrInfo::EXTRACT_SUBREG &&
- MI->getOperand(1).getReg() == Reg)
+ if (OpIdx == 1 && MI->getOpcode() == TargetInstrInfo::EXTRACT_SUBREG)
return true;
return false;
}
@@ -148,6 +145,20 @@ void LiveIntervals::processImplicitDefs() {
continue;
}
+ if (MI->getOpcode() == TargetInstrInfo::INSERT_SUBREG) {
+ MachineOperand &MO = MI->getOperand(2);
+ if (ImpDefRegs.count(MO.getReg())) {
+ // %reg1032<def> = INSERT_SUBREG %reg1032, undef, 2
+ // This is an identity copy, eliminate it now.
+ if (MO.isKill()) {
+ LiveVariables::VarInfo& vi = lv_->getVarInfo(MO.getReg());
+ vi.removeKill(MI);
+ }
+ MI->eraseFromParent();
+ continue;
+ }
+ }
+
bool ChangedToImpDef = false;
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
MachineOperand& MO = MI->getOperand(i);
@@ -159,13 +170,16 @@ void LiveIntervals::processImplicitDefs() {
if (!ImpDefRegs.count(Reg))
continue;
// Use is a copy, just turn it into an implicit_def.
- if (CanTurnIntoImplicitDef(MI, Reg, tii_)) {
+ if (CanTurnIntoImplicitDef(MI, Reg, i, tii_)) {
bool isKill = MO.isKill();
MI->setDesc(tii_->get(TargetInstrInfo::IMPLICIT_DEF));
for (int j = MI->getNumOperands() - 1, ee = 0; j > ee; --j)
MI->RemoveOperand(j);
- if (isKill)
+ if (isKill) {
ImpDefRegs.erase(Reg);
+ LiveVariables::VarInfo& vi = lv_->getVarInfo(Reg);
+ vi.removeKill(MI);
+ }
ChangedToImpDef = true;
break;
}
@@ -738,8 +752,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
MachineInstr *Kill = vi.Kills[i];
MachineInstrIndex killIdx =
getNextSlot(getUseIndex(getInstructionIndex(Kill)));
- LiveRange LR(getMBBStartIdx(Kill->getParent()),
- killIdx, ValNo);
+ LiveRange LR(getMBBStartIdx(Kill->getParent()), killIdx, ValNo);
interval.addRange(LR);
ValNo->addKill(killIdx);
DEBUG(errs() << " +" << LR);