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authorAndrew Trick <atrick@apple.com>2013-06-25 02:48:58 +0000
committerAndrew Trick <atrick@apple.com>2013-06-25 02:48:58 +0000
commitb2b5dc642cbbe781f73b9da83874d4005c50bd8e (patch)
treede069755e86d024fd756be8e3bb35301ae437dbc /lib
parent73e44d8ae4c227af92b8f96f447e4a7ed38f6de5 (diff)
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Revert "Temporarily enable MI-Sched on X86."
This reverts commit 98a9b72e8c56dc13a2617de84503a3d78352789c. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184823 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Target/X86/X86Subtarget.h5
1 files changed, 1 insertions, 4 deletions
diff --git a/lib/Target/X86/X86Subtarget.h b/lib/Target/X86/X86Subtarget.h
index 59911ba..66832b9 100644
--- a/lib/Target/X86/X86Subtarget.h
+++ b/lib/Target/X86/X86Subtarget.h
@@ -361,14 +361,11 @@ public:
/// memset with zero passed as the second argument. Otherwise it
/// returns null.
const char *getBZeroEntry() const;
-
+
/// This function returns true if the target has sincos() routine in its
/// compiler runtime or math libraries.
bool hasSinCos() const;
- /// Enable the MachineScheduler pass for all X86 subtargets.
- bool enableMachineScheduler() const LLVM_OVERRIDE { return true; }
-
/// enablePostRAScheduler - run for Atom optimization.
bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
TargetSubtargetInfo::AntiDepBreakMode& Mode,