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author | Chris Lattner <sabre@nondot.org> | 2007-04-09 22:27:04 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2007-04-09 22:27:04 +0000 |
commit | b445d0cbb9b299ba8ec7be2494e35c501b6d3a93 (patch) | |
tree | e35497f8cd721b96c26fc55677bda07174973ea3 /lib | |
parent | 17cba6d2326f1f81098334def5f4f99d867e3ce4 (diff) | |
download | external_llvm-b445d0cbb9b299ba8ec7be2494e35c501b6d3a93.zip external_llvm-b445d0cbb9b299ba8ec7be2494e35c501b6d3a93.tar.gz external_llvm-b445d0cbb9b299ba8ec7be2494e35c501b6d3a93.tar.bz2 |
remove some dead target hooks, subsumed by isLegalAddressingMode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35840 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/CodeGen/SelectionDAG/TargetLowering.cpp | 17 | ||||
-rw-r--r-- | lib/Target/ARM/ARMISelLowering.cpp | 18 | ||||
-rw-r--r-- | lib/Target/ARM/ARMISelLowering.h | 12 | ||||
-rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 16 | ||||
-rw-r--r-- | lib/Target/X86/X86ISelLowering.h | 12 |
5 files changed, 0 insertions, 75 deletions
diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp index 195b150..51d8187 100644 --- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -1993,23 +1993,6 @@ bool TargetLowering::isLegalAddressScale(int64_t S, const Type *Ty) const { return false; } -/// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale -/// and V works for isLegalAddressImmediate _and_ both can be applied -/// simultaneously to the same instruction. -bool TargetLowering::isLegalAddressScaleAndImm(int64_t S, int64_t V, - const Type* Ty) const { - return false; -} - -/// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale -/// and GV works for isLegalAddressImmediate _and_ both can be applied -/// simultaneously to the same instruction. -bool TargetLowering::isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV, - const Type* Ty) const { - - return false; -} - // Magic for divide replacement struct ms { diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index ef8ab01..0b64cfe 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -1441,24 +1441,6 @@ bool ARMTargetLowering::isLegalAddressScale(int64_t S, const Type *Ty) const { } } -/// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale -/// and V works for isLegalAddressImmediate _and_ both can be applied -/// simultaneously to the same instruction. -bool ARMTargetLowering::isLegalAddressScaleAndImm(int64_t S, int64_t V, - const Type* Ty) const { - if (V == 0) - return isLegalAddressScale(S, Ty); - return false; -} - -/// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale -/// and GV works for isLegalAddressImmediate _and_ both can be applied -/// simultaneously to the same instruction. -bool ARMTargetLowering::isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV, - const Type* Ty) const { - return false; -} - static bool getIndexedAddressParts(SDNode *Ptr, MVT::ValueType VT, bool isSEXTLoad, SDOperand &Base, SDOperand &Offset, bool &isInc, diff --git a/lib/Target/ARM/ARMISelLowering.h b/lib/Target/ARM/ARMISelLowering.h index 9842b92..71a115e 100644 --- a/lib/Target/ARM/ARMISelLowering.h +++ b/lib/Target/ARM/ARMISelLowering.h @@ -99,18 +99,6 @@ namespace llvm { /// type. virtual bool isLegalAddressScale(int64_t S, const Type *Ty) const; - /// isLegalAddressScaleAndImm - Return true if S works for - /// IsLegalAddressScale and V works for isLegalAddressImmediate _and_ - /// both can be applied simultaneously to the same instruction. - virtual bool isLegalAddressScaleAndImm(int64_t S, int64_t V, - const Type *Ty) const; - - /// isLegalAddressScaleAndImm - Return true if S works for - /// IsLegalAddressScale and GV works for isLegalAddressImmediate _and_ - /// both can be applied simultaneously to the same instruction. - virtual bool isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV, - const Type *Ty) const; - /// getPreIndexedAddressParts - returns true by value, base pointer and /// offset pointer and addressing mode by reference if the node's address /// can be legally represented as pre-indexed load / store address. diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 18c5b32..395338a 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -4127,22 +4127,6 @@ bool X86TargetLowering::isLegalAddressScale(int64_t S, const Type *Ty) const { } } -/// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale -/// and V works for isLegalAddressImmediate _and_ both can be applied -/// simultaneously to the same instruction. -bool X86TargetLowering::isLegalAddressScaleAndImm(int64_t S, int64_t V, - const Type* Ty) const { - return isLegalAddressScale(S, Ty) && isLegalAddressImmediate(V, Ty); -} - -/// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale -/// and GV works for isLegalAddressImmediate _and_ both can be applied -/// simultaneously to the same instruction. -bool X86TargetLowering::isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV, - const Type* Ty) const { - return isLegalAddressScale(S, Ty) && isLegalAddressImmediate(GV); -} - /// isShuffleMaskLegal - Targets can use this to indicate that they only /// support *some* VECTOR_SHUFFLE operations, those with specific masks. /// By default, if a target supports the VECTOR_SHUFFLE node, all mask values diff --git a/lib/Target/X86/X86ISelLowering.h b/lib/Target/X86/X86ISelLowering.h index 610ea00..7a41cdd 100644 --- a/lib/Target/X86/X86ISelLowering.h +++ b/lib/Target/X86/X86ISelLowering.h @@ -353,18 +353,6 @@ namespace llvm { /// type. virtual bool isLegalAddressScale(int64_t S, const Type *Ty) const; - /// isLegalAddressScaleAndImm - Return true if S works for - /// IsLegalAddressScale and V works for isLegalAddressImmediate _and_ - /// both can be applied simultaneously to the same instruction. - virtual bool isLegalAddressScaleAndImm(int64_t S, int64_t V, - const Type *Ty) const; - - /// isLegalAddressScaleAndImm - Return true if S works for - /// IsLegalAddressScale and GV works for isLegalAddressImmediate _and_ - /// both can be applied simultaneously to the same instruction. - virtual bool isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV, - const Type *Ty) const; - /// isShuffleMaskLegal - Targets can use this to indicate that they only /// support *some* VECTOR_SHUFFLE operations, those with specific masks. /// By default, if a target supports the VECTOR_SHUFFLE node, all mask |