diff options
author | Bill Wendling <isanbard@gmail.com> | 2010-05-14 21:14:32 +0000 |
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committer | Bill Wendling <isanbard@gmail.com> | 2010-05-14 21:14:32 +0000 |
commit | b92187a4103dca24c3767c380f63593d1f6161a7 (patch) | |
tree | 9738da47c31fc9857da418efd106d259ab3bb4f6 /lib | |
parent | 552b888744c4f70703c29659188c628eecefc908 (diff) | |
download | external_llvm-b92187a4103dca24c3767c380f63593d1f6161a7.zip external_llvm-b92187a4103dca24c3767c380f63593d1f6161a7.tar.gz external_llvm-b92187a4103dca24c3767c380f63593d1f6161a7.tar.bz2 |
Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe what
the variable actually tracks.
N.B., several back-ends are using "HasCalls" as being synonymous for something
that adjusts the stack. This isn't 100% correct and should be looked into.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103802 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/CodeGen/AsmPrinter/DwarfException.cpp | 17 | ||||
-rw-r--r-- | lib/CodeGen/AsmPrinter/DwarfException.h | 4 | ||||
-rw-r--r-- | lib/CodeGen/PrologEpilogInserter.cpp | 30 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 14 | ||||
-rw-r--r-- | lib/Target/ARM/ARMBaseRegisterInfo.cpp | 4 | ||||
-rw-r--r-- | lib/Target/Blackfin/BlackfinRegisterInfo.cpp | 6 | ||||
-rw-r--r-- | lib/Target/CellSPU/SPURegisterInfo.cpp | 4 | ||||
-rw-r--r-- | lib/Target/MBlaze/AsmPrinter/MBlazeAsmPrinter.cpp | 2 | ||||
-rw-r--r-- | lib/Target/MBlaze/MBlazeRegisterInfo.cpp | 12 | ||||
-rw-r--r-- | lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp | 2 | ||||
-rw-r--r-- | lib/Target/Mips/MipsRegisterInfo.cpp | 10 | ||||
-rw-r--r-- | lib/Target/PowerPC/PPCRegisterInfo.cpp | 2 | ||||
-rw-r--r-- | lib/Target/SystemZ/SystemZRegisterInfo.cpp | 10 | ||||
-rw-r--r-- | lib/Target/TargetMachine.cpp | 2 | ||||
-rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 2 | ||||
-rw-r--r-- | lib/Target/X86/X86RegisterInfo.cpp | 2 |
16 files changed, 69 insertions, 54 deletions
diff --git a/lib/CodeGen/AsmPrinter/DwarfException.cpp b/lib/CodeGen/AsmPrinter/DwarfException.cpp index 0ff1036..c872840 100644 --- a/lib/CodeGen/AsmPrinter/DwarfException.cpp +++ b/lib/CodeGen/AsmPrinter/DwarfException.cpp @@ -189,7 +189,7 @@ void DwarfException::EmitFDE(const FunctionEHFrameInfo &EHFrameInfo) { // EH Frame, but some environments do not handle weak absolute symbols. If // UnwindTablesMandatory is set we cannot do this optimization; the unwind // info is to be available for non-EH uses. - if (!EHFrameInfo.hasCalls && !UnwindTablesMandatory && + if (!EHFrameInfo.adjustsStack && !UnwindTablesMandatory && (!TheFunc->isWeakForLinker() || !Asm->MAI->getWeakDefDirective() || TLOF.getSupportsWeakOmittedEHFrame())) { @@ -949,11 +949,12 @@ void DwarfException::EndFunction() { TLOF.isFunctionEHFrameSymbolPrivate()); // Save EH frame information - EHFrames.push_back(FunctionEHFrameInfo(FunctionEHSym, - Asm->getFunctionNumber(), - MMI->getPersonalityIndex(), - Asm->MF->getFrameInfo()->hasCalls(), - !MMI->getLandingPads().empty(), - MMI->getFrameMoves(), - Asm->MF->getFunction())); + EHFrames. + push_back(FunctionEHFrameInfo(FunctionEHSym, + Asm->getFunctionNumber(), + MMI->getPersonalityIndex(), + Asm->MF->getFrameInfo()->adjustsStack(), + !MMI->getLandingPads().empty(), + MMI->getFrameMoves(), + Asm->MF->getFunction())); } diff --git a/lib/CodeGen/AsmPrinter/DwarfException.h b/lib/CodeGen/AsmPrinter/DwarfException.h index 5839f8c..bc311e6 100644 --- a/lib/CodeGen/AsmPrinter/DwarfException.h +++ b/lib/CodeGen/AsmPrinter/DwarfException.h @@ -45,7 +45,7 @@ class DwarfException { MCSymbol *FunctionEHSym; // L_foo.eh unsigned Number; unsigned PersonalityIndex; - bool hasCalls; + bool adjustsStack; bool hasLandingPads; std::vector<MachineMove> Moves; const Function *function; @@ -55,7 +55,7 @@ class DwarfException { const std::vector<MachineMove> &M, const Function *f): FunctionEHSym(EHSym), Number(Num), PersonalityIndex(P), - hasCalls(hC), hasLandingPads(hL), Moves(M), function (f) { } + adjustsStack(hC), hasLandingPads(hL), Moves(M), function (f) { } }; std::vector<FunctionEHFrameInfo> EHFrames; diff --git a/lib/CodeGen/PrologEpilogInserter.cpp b/lib/CodeGen/PrologEpilogInserter.cpp index e3da67b..1c27f185 100644 --- a/lib/CodeGen/PrologEpilogInserter.cpp +++ b/lib/CodeGen/PrologEpilogInserter.cpp @@ -58,8 +58,9 @@ bool PEI::runOnMachineFunction(MachineFunction &Fn) { FrameIndexVirtualScavenging = TRI->requiresFrameIndexScavenging(Fn); FrameConstantRegMap.clear(); - // Calculate the MaxCallFrameSize and HasCalls variables for the function's - // frame information. Also eliminates call frame pseudo instructions. + // Calculate the MaxCallFrameSize and AdjustsStack variables for the + // function's frame information. Also eliminates call frame pseudo + // instructions. calculateCallsInformation(Fn); // Allow the target machine to make some adjustments to the function @@ -91,8 +92,8 @@ bool PEI::runOnMachineFunction(MachineFunction &Fn) { // Add prolog and epilog code to the function. This function is required // to align the stack frame as necessary for any stack variables or - // called functions. Because of this, calculateCalleeSavedRegisters - // must be called before this function in order to set the HasCalls + // called functions. Because of this, calculateCalleeSavedRegisters() + // must be called before this function in order to set the AdjustsStack // and MaxCallFrameSize variables. if (!F->hasFnAttr(Attribute::Naked)) insertPrologEpilogCode(Fn); @@ -126,7 +127,7 @@ void PEI::getAnalysisUsage(AnalysisUsage &AU) const { } #endif -/// calculateCallsInformation - Calculate the MaxCallFrameSize and HasCalls +/// calculateCallsInformation - Calculate the MaxCallFrameSize and AdjustsStack /// variables for the function's frame information and eliminate call frame /// pseudo instructions. void PEI::calculateCallsInformation(MachineFunction &Fn) { @@ -134,7 +135,7 @@ void PEI::calculateCallsInformation(MachineFunction &Fn) { MachineFrameInfo *MFI = Fn.getFrameInfo(); unsigned MaxCallFrameSize = 0; - bool HasCalls = MFI->hasCalls(); + bool AdjustsStack = MFI->adjustsStack(); // Get the function call frame set-up and tear-down instruction opcode int FrameSetupOpcode = RegInfo->getCallFrameSetupOpcode(); @@ -154,15 +155,15 @@ void PEI::calculateCallsInformation(MachineFunction &Fn) { " instructions should have a single immediate argument!"); unsigned Size = I->getOperand(0).getImm(); if (Size > MaxCallFrameSize) MaxCallFrameSize = Size; - HasCalls = true; + AdjustsStack = true; FrameSDOps.push_back(I); } else if (I->isInlineAsm()) { // An InlineAsm might be a call; assume it is to get the stack frame // aligned correctly for calls. - HasCalls = true; + AdjustsStack = true; } - MFI->setHasCalls(HasCalls); + MFI->setAdjustsStack(AdjustsStack); MFI->setMaxCallFrameSize(MaxCallFrameSize); for (std::vector<MachineBasicBlock::iterator>::iterator @@ -577,7 +578,7 @@ void PEI::calculateFrameObjectOffsets(MachineFunction &Fn) { // If we have reserved argument space for call sites in the function // immediately on entry to the current function, count it as part of the // overall stack size. - if (MFI->hasCalls() && RegInfo->hasReservedCallFrame(Fn)) + if (MFI->adjustsStack() && RegInfo->hasReservedCallFrame(Fn)) Offset += MFI->getMaxCallFrameSize(); // Round up the size to a multiple of the alignment. If the function has @@ -586,13 +587,14 @@ void PEI::calculateFrameObjectOffsets(MachineFunction &Fn) { // otherwise, for leaf functions, align to the TransientStackAlignment // value. unsigned StackAlign; - if (MFI->hasCalls() || MFI->hasVarSizedObjects() || + if (MFI->adjustsStack() || MFI->hasVarSizedObjects() || (RegInfo->needsStackRealignment(Fn) && MFI->getObjectIndexEnd() != 0)) StackAlign = TFI.getStackAlignment(); else StackAlign = TFI.getTransientStackAlignment(); - // If the frame pointer is eliminated, all frame offsets will be relative - // to SP not FP; align to MaxAlign so this works. + + // If the frame pointer is eliminated, all frame offsets will be relative to + // SP not FP. Align to MaxAlign so this works. StackAlign = std::max(StackAlign, MaxAlign); unsigned AlignMask = StackAlign - 1; Offset = (Offset + AlignMask) & ~uint64_t(AlignMask); @@ -602,7 +604,6 @@ void PEI::calculateFrameObjectOffsets(MachineFunction &Fn) { MFI->setStackSize(Offset - LocalAreaOffset); } - /// insertPrologEpilogCode - Scan the function for modified callee saved /// registers, insert spill code for these callee saved registers, then add /// prolog and epilog code to the function. @@ -621,7 +622,6 @@ void PEI::insertPrologEpilogCode(MachineFunction &Fn) { } } - /// replaceFrameIndices - Replace all MO_FrameIndex operands with physical /// register references and actual offsets. /// diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index 422cb7a..8c0a61f 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -28,6 +28,7 @@ #include "llvm/CodeGen/FastISel.h" #include "llvm/CodeGen/GCStrategy.h" #include "llvm/CodeGen/GCMetadata.h" +#include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/MachineModuleInfo.h" @@ -605,6 +606,19 @@ MachineBasicBlock *SelectionDAGISel::CodeGenAndEmitDAG(MachineBasicBlock *BB) { delete Scheduler; } + // Determine if there are any calls in this machine function. + MachineFrameInfo *MFI = MF->getFrameInfo(); + if (!MFI->hasCalls()) { + for (MachineBasicBlock::iterator + I = BB->begin(), E = BB->end(); I != E; ++I) { + const TargetInstrDesc &TID = TM.getInstrInfo()->get(I->getOpcode()); + if (I->isInlineAsm() || (TID.isCall() && !TID.isReturn())) { + MFI->setHasCalls(true); + break; + } + } + } + // Free the SelectionDAG state, now that we're finished with it. CurDAG->clear(); diff --git a/lib/Target/ARM/ARMBaseRegisterInfo.cpp b/lib/Target/ARM/ARMBaseRegisterInfo.cpp index 1f7d842..9b7dc30 100644 --- a/lib/Target/ARM/ARMBaseRegisterInfo.cpp +++ b/lib/Target/ARM/ARMBaseRegisterInfo.cpp @@ -543,7 +543,7 @@ ARMBaseRegisterInfo::UpdateRegAllocHint(unsigned Reg, unsigned NewReg, /// bool ARMBaseRegisterInfo::hasFP(const MachineFunction &MF) const { const MachineFrameInfo *MFI = MF.getFrameInfo(); - return ((DisableFramePointerElim(MF) && MFI->hasCalls())|| + return ((DisableFramePointerElim(MF) && MFI->adjustsStack())|| needsStackRealignment(MF) || MFI->hasVarSizedObjects() || MFI->isFrameAddressTaken()); @@ -571,7 +571,7 @@ needsStackRealignment(const MachineFunction &MF) const { bool ARMBaseRegisterInfo:: cannotEliminateFrame(const MachineFunction &MF) const { const MachineFrameInfo *MFI = MF.getFrameInfo(); - if (DisableFramePointerElim(MF) && MFI->hasCalls()) + if (DisableFramePointerElim(MF) && MFI->adjustsStack()) return true; return MFI->hasVarSizedObjects() || MFI->isFrameAddressTaken() || needsStackRealignment(MF); diff --git a/lib/Target/Blackfin/BlackfinRegisterInfo.cpp b/lib/Target/Blackfin/BlackfinRegisterInfo.cpp index 2512c9b..0571eb3 100644 --- a/lib/Target/Blackfin/BlackfinRegisterInfo.cpp +++ b/lib/Target/Blackfin/BlackfinRegisterInfo.cpp @@ -111,7 +111,7 @@ BlackfinRegisterInfo::getPhysicalRegisterRegClass(unsigned reg, EVT VT) const { bool BlackfinRegisterInfo::hasFP(const MachineFunction &MF) const { const MachineFrameInfo *MFI = MF.getFrameInfo(); return DisableFramePointerElim(MF) || - MFI->hasCalls() || MFI->hasVarSizedObjects(); + MFI->adjustsStack() || MFI->hasVarSizedObjects(); } bool BlackfinRegisterInfo:: @@ -394,7 +394,7 @@ void BlackfinRegisterInfo::emitPrologue(MachineFunction &MF) const { } if (!hasFP(MF)) { - assert(!MFI->hasCalls() && + assert(!MFI->adjustsStack() && "FP elimination on a non-leaf function is not supported"); adjustRegister(MBB, MBBI, dl, BF::SP, BF::P1, -FrameSize); return; @@ -435,7 +435,7 @@ void BlackfinRegisterInfo::emitEpilogue(MachineFunction &MF, assert(FrameSize%4 == 0 && "Misaligned frame size"); if (!hasFP(MF)) { - assert(!MFI->hasCalls() && + assert(!MFI->adjustsStack() && "FP elimination on a non-leaf function is not supported"); adjustRegister(MBB, MBBI, dl, BF::SP, BF::P1, FrameSize); return; diff --git a/lib/Target/CellSPU/SPURegisterInfo.cpp b/lib/Target/CellSPU/SPURegisterInfo.cpp index fdbe10f..d8937ec 100644 --- a/lib/Target/CellSPU/SPURegisterInfo.cpp +++ b/lib/Target/CellSPU/SPURegisterInfo.cpp @@ -469,7 +469,7 @@ void SPURegisterInfo::emitPrologue(MachineFunction &MF) const && "SPURegisterInfo::emitPrologue: FrameSize not aligned"); // the "empty" frame size is 16 - just the register scavenger spill slot - if (FrameSize > 16 || MFI->hasCalls()) { + if (FrameSize > 16 || MFI->adjustsStack()) { FrameSize = -(FrameSize + SPUFrameInfo::minStackSize()); if (hasDebugInfo) { // Mark effective beginning of when frame pointer becomes valid. @@ -569,7 +569,7 @@ SPURegisterInfo::emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const && "SPURegisterInfo::emitEpilogue: FrameSize not aligned"); // the "empty" frame size is 16 - just the register scavenger spill slot - if (FrameSize > 16 || MFI->hasCalls()) { + if (FrameSize > 16 || MFI->adjustsStack()) { FrameSize = FrameSize + SPUFrameInfo::minStackSize(); if (isInt<10>(FrameSize + LinkSlotOffset)) { // Reload $lr, adjust $sp by required amount diff --git a/lib/Target/MBlaze/AsmPrinter/MBlazeAsmPrinter.cpp b/lib/Target/MBlaze/AsmPrinter/MBlazeAsmPrinter.cpp index 04dfb0a..e42e9b3 100644 --- a/lib/Target/MBlaze/AsmPrinter/MBlazeAsmPrinter.cpp +++ b/lib/Target/MBlaze/AsmPrinter/MBlazeAsmPrinter.cpp @@ -155,7 +155,7 @@ void MBlazeAsmPrinter::printSavedRegsBitmask(raw_ostream &O) { CPUBitmask |= (1 << MBlazeRegisterInfo:: getRegisterNumbering(RI.getFrameRegister(*MF))); - if (MFI->hasCalls()) + if (MFI->adjustsStack()) CPUBitmask |= (1 << MBlazeRegisterInfo:: getRegisterNumbering(RI.getRARegister())); diff --git a/lib/Target/MBlaze/MBlazeRegisterInfo.cpp b/lib/Target/MBlaze/MBlazeRegisterInfo.cpp index e15176e..f15eea9 100644 --- a/lib/Target/MBlaze/MBlazeRegisterInfo.cpp +++ b/lib/Target/MBlaze/MBlazeRegisterInfo.cpp @@ -220,7 +220,7 @@ void MBlazeRegisterInfo::adjustMBlazeStackFrame(MachineFunction &MF) const { StackOffset += RegSize; } - if (MFI->hasCalls()) { + if (MFI->adjustsStack()) { MBlazeFI->setRAStackOffset(0); MFI->setObjectOffset(MFI->CreateStackObject(RegSize, RegSize, true), StackOffset); @@ -311,8 +311,8 @@ emitPrologue(MachineFunction &MF) const { unsigned StackSize = MFI->getStackSize(); // No need to allocate space on the stack. - if (StackSize == 0 && !MFI->hasCalls()) return; - if (StackSize < 28 && MFI->hasCalls()) StackSize = 28; + if (StackSize == 0 && !MFI->adjustsStack()) return; + if (StackSize < 28 && MFI->adjustsStack()) StackSize = 28; int FPOffset = MBlazeFI->getFPStackOffset(); int RAOffset = MBlazeFI->getRAStackOffset(); @@ -323,7 +323,7 @@ emitPrologue(MachineFunction &MF) const { // Save the return address only if the function isnt a leaf one. // swi R15, R1, stack_loc - if (MFI->hasCalls()) { + if (MFI->adjustsStack()) { BuildMI(MBB, MBBI, DL, TII.get(MBlaze::SWI)) .addReg(MBlaze::R15).addImm(RAOffset).addReg(MBlaze::R1); } @@ -366,14 +366,14 @@ emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const { // Restore the return address only if the function isnt a leaf one. // lwi R15, R1, stack_loc - if (MFI->hasCalls()) { + if (MFI->adjustsStack()) { BuildMI(MBB, MBBI, dl, TII.get(MBlaze::LWI), MBlaze::R15) .addImm(RAOffset).addReg(MBlaze::R1); } // Get the number of bytes from FrameInfo int StackSize = (int) MFI->getStackSize(); - if (StackSize < 28 && MFI->hasCalls()) StackSize = 28; + if (StackSize < 28 && MFI->adjustsStack()) StackSize = 28; // adjust stack. // addi R1, R1, imm diff --git a/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp b/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp index d269153..4d7fe4c 100644 --- a/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp +++ b/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp @@ -145,7 +145,7 @@ void MipsAsmPrinter::printSavedRegsBitmask(raw_ostream &O) { CPUBitmask |= (1 << MipsRegisterInfo:: getRegisterNumbering(RI.getFrameRegister(*MF))); - if (MFI->hasCalls()) + if (MFI->adjustsStack()) CPUBitmask |= (1 << MipsRegisterInfo:: getRegisterNumbering(RI.getRARegister())); diff --git a/lib/Target/Mips/MipsRegisterInfo.cpp b/lib/Target/Mips/MipsRegisterInfo.cpp index 478da84..5e719af 100644 --- a/lib/Target/Mips/MipsRegisterInfo.cpp +++ b/lib/Target/Mips/MipsRegisterInfo.cpp @@ -288,7 +288,7 @@ void MipsRegisterInfo::adjustMipsStackFrame(MachineFunction &MF) const // Stack locations for FP and RA. If only one of them is used, // the space must be allocated for both, otherwise no space at all. - if (hasFP(MF) || MFI->hasCalls()) { + if (hasFP(MF) || MFI->adjustsStack()) { // FP stack location MFI->setObjectOffset(MFI->CreateStackObject(RegSize, RegSize, true), StackOffset); @@ -302,7 +302,7 @@ void MipsRegisterInfo::adjustMipsStackFrame(MachineFunction &MF) const MipsFI->setRAStackOffset(StackOffset); StackOffset += RegSize; - if (MFI->hasCalls()) + if (MFI->adjustsStack()) TopCPUSavedRegOff += RegSize; } @@ -407,7 +407,7 @@ emitPrologue(MachineFunction &MF) const unsigned StackSize = MFI->getStackSize(); // No need to allocate space on the stack. - if (StackSize == 0 && !MFI->hasCalls()) return; + if (StackSize == 0 && !MFI->adjustsStack()) return; int FPOffset = MipsFI->getFPStackOffset(); int RAOffset = MipsFI->getRAStackOffset(); @@ -425,7 +425,7 @@ emitPrologue(MachineFunction &MF) const // Save the return address only if the function isnt a leaf one. // sw $ra, stack_loc($sp) - if (MFI->hasCalls()) { + if (MFI->adjustsStack()) { BuildMI(MBB, MBBI, dl, TII.get(Mips::SW)) .addReg(Mips::RA).addImm(RAOffset).addReg(Mips::SP); } @@ -477,7 +477,7 @@ emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const // Restore the return address only if the function isnt a leaf one. // lw $ra, stack_loc($sp) - if (MFI->hasCalls()) { + if (MFI->adjustsStack()) { BuildMI(MBB, MBBI, dl, TII.get(Mips::LW), Mips::RA) .addImm(RAOffset).addReg(Mips::SP); } diff --git a/lib/Target/PowerPC/PPCRegisterInfo.cpp b/lib/Target/PowerPC/PPCRegisterInfo.cpp index 5f1e04e..0bccf15 100644 --- a/lib/Target/PowerPC/PPCRegisterInfo.cpp +++ b/lib/Target/PowerPC/PPCRegisterInfo.cpp @@ -1009,7 +1009,7 @@ void PPCRegisterInfo::determineFrameLayout(MachineFunction &MF) const { if (!DisableRedZone && FrameSize <= 224 && // Fits in red zone. !MFI->hasVarSizedObjects() && // No dynamic alloca. - !MFI->hasCalls() && // No calls. + !MFI->adjustsStack() && // No calls. (!ALIGN_STACK || MaxAlign <= TargetAlign)) { // No special alignment. // No need for frame MFI->setStackSize(0); diff --git a/lib/Target/SystemZ/SystemZRegisterInfo.cpp b/lib/Target/SystemZ/SystemZRegisterInfo.cpp index 638fd17..420005b 100644 --- a/lib/Target/SystemZ/SystemZRegisterInfo.cpp +++ b/lib/Target/SystemZ/SystemZRegisterInfo.cpp @@ -102,7 +102,7 @@ int SystemZRegisterInfo::getFrameIndexOffset(const MachineFunction &MF, Offset += StackSize - TFI.getOffsetOfLocalArea(); // Skip the register save area if we generated the stack frame. - if (StackSize || MFI->hasCalls()) + if (StackSize || MFI->adjustsStack()) Offset -= TFI.getOffsetOfLocalArea(); return Offset; @@ -163,14 +163,14 @@ SystemZRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF, for (unsigned i = 0, e = array_lengthof(HighFPRs); i != e; ++i) HighFPRsUsed |= MRI.isPhysRegUsed(HighFPRs[i]); - if (FFI->hasCalls()) + if (FFI->adjustsStack()) /* FIXME: function is varargs */ /* FIXME: function grabs RA */ /* FIXME: function calls eh_return */ MRI.setPhysRegUsed(SystemZ::R14D); if (HighFPRsUsed || - FFI->hasCalls() || + FFI->adjustsStack() || FFI->getObjectIndexEnd() != 0 || // Contains automatic variables FFI->hasVarSizedObjects() // Function calls dynamic alloca's /* FIXME: function is varargs */) @@ -234,7 +234,7 @@ void SystemZRegisterInfo::emitPrologue(MachineFunction &MF) const { DL = MBBI->getDebugLoc(); // adjust stack pointer: R15 -= numbytes - if (StackSize || MFI->hasCalls()) { + if (StackSize || MFI->adjustsStack()) { assert(MF.getRegInfo().isPhysRegUsed(SystemZ::R15D) && "Invalid stack frame calculation!"); emitSPUpdate(MBB, MBBI, -(int64_t)NumBytes, TII); @@ -286,7 +286,7 @@ void SystemZRegisterInfo::emitEpilogue(MachineFunction &MF, // During callee-saved restores emission stack frame was not yet finialized // (and thus - the stack size was unknown). Tune the offset having full stack // size in hands. - if (StackSize || MFI->hasCalls()) { + if (StackSize || MFI->adjustsStack()) { assert((MBBI->getOpcode() == SystemZ::MOV64rmm || MBBI->getOpcode() == SystemZ::MOV64rm) && "Expected to see callee-save register restore code"); diff --git a/lib/Target/TargetMachine.cpp b/lib/Target/TargetMachine.cpp index ac67c91..54650a0 100644 --- a/lib/Target/TargetMachine.cpp +++ b/lib/Target/TargetMachine.cpp @@ -277,7 +277,7 @@ namespace llvm { return true; if (NoFramePointerElimNonLeaf) { const MachineFrameInfo *MFI = MF.getFrameInfo(); - return MFI->hasCalls(); + return MFI->adjustsStack(); } return false; } diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 8821bef..4e2ff3a 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -5272,7 +5272,7 @@ GetTLSADDR(SelectionDAG &DAG, SDValue Chain, GlobalAddressSDNode *GA, } // TLSADDR will be codegen'ed as call. Inform MFI that function has calls. - MFI->setHasCalls(true); + MFI->setAdjustsStack(true); SDValue Flag = Chain.getValue(1); return DAG.getCopyFromReg(Chain, dl, ReturnReg, PtrVT, Flag); diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp index f24138a..2db3c70 100644 --- a/lib/Target/X86/X86RegisterInfo.cpp +++ b/lib/Target/X86/X86RegisterInfo.cpp @@ -898,7 +898,7 @@ void X86RegisterInfo::emitPrologue(MachineFunction &MF) const { if (Is64Bit && !Fn->hasFnAttr(Attribute::NoRedZone) && !needsStackRealignment(MF) && !MFI->hasVarSizedObjects() && // No dynamic alloca. - !MFI->hasCalls() && // No calls. + !MFI->adjustsStack() && // No calls. !Subtarget->isTargetWin64()) { // Win64 has no Red Zone uint64_t MinSize = X86FI->getCalleeSavedFrameSize(); if (HasFP) MinSize += SlotSize; |