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authorEvan Cheng <evan.cheng@apple.com>2008-03-10 07:59:01 +0000
committerEvan Cheng <evan.cheng@apple.com>2008-03-10 07:59:01 +0000
commitba0f30fd59e32c2bfb1ce949fa95ebb05f4d65cc (patch)
treeeb2631ca12551f37e1c5b4c48929e516a7ba9308 /lib
parent084a3ee5953b9c75b7d8bf4f5f7f411f9f1cb77f (diff)
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Doh
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48140 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/CodeGen/SelectionDAG/DAGCombiner.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 1b00855..3a8c468 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -1102,12 +1102,13 @@ SDOperand DAGCombiner::visitSUB(SDNode *N) {
}
// fold (sub x, x) -> 0
- if (N0 == N1)
+ if (N0 == N1) {
if (ISD::isBuildVectorAllZeros(N0.Val))
// Zero vectors might be normalized to a particular vector type to ensure
// they are CSE'd. Return it as it is.
return N0;
return DAG.getConstant(0, N->getValueType(0));
+ }
// fold (sub c1, c2) -> c1-c2
if (N0C && N1C)
return DAG.getNode(ISD::SUB, VT, N0, N1);