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authorJohnny Chen <johnny.chen@apple.com>2010-02-11 17:14:31 +0000
committerJohnny Chen <johnny.chen@apple.com>2010-02-11 17:14:31 +0000
commitba6e033f4f2b22dce4766a55dead8385a955fd46 (patch)
tree5af02f614f879efabf3b5a8bd2b33acd928c7f7c /lib
parente9d10a6c398246fac376804143e868d6c20b6947 (diff)
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Add pseudo instruction TRAP for disassembly, which is encoded according to A5-21
as the "Permanently UNDEFINED" instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95873 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Target/ARM/ARMInstrInfo.td10
1 files changed, 10 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index eb7d4e4..1e3847f 100644
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -619,6 +619,16 @@ def DBG : AI<(outs), (ins i32imm:$opt), Pseudo, NoItinerary, "dbg", "\t$opt",
let Inst{7-4} = 0b1111;
}
+// A5.4 Permanently UNDEFINED instructions.
+def TRAP : AI<(outs), (ins), Pseudo, NoItinerary, "trap", "",
+ [/* For disassembly only; pattern left blank */]>,
+ Requires<[IsARM]> {
+ let Inst{27-25} = 0b011;
+ let Inst{24-20} = 0b11111;
+ let Inst{7-5} = 0b111;
+ let Inst{4} = 0b1;
+}
+
// Address computation and loads and stores in PIC mode.
let isNotDuplicable = 1 in {
def PICADD : AXI1<0b0100, (outs GPR:$dst), (ins GPR:$a, pclabel:$cp, pred:$p),