diff options
author | Chris Lattner <sabre@nondot.org> | 2006-01-27 22:25:06 +0000 |
---|---|---|
committer | Chris Lattner <sabre@nondot.org> | 2006-01-27 22:25:06 +0000 |
commit | bba534dc6676fa6a91dfb4492b30faf67bd22abe (patch) | |
tree | cbba1e14d1ad24237e52c36f5148c6118633676b /lib | |
parent | 9b0ffca47844c10b778d37cf5641a108e5218dd6 (diff) | |
download | external_llvm-bba534dc6676fa6a91dfb4492b30faf67bd22abe.zip external_llvm-bba534dc6676fa6a91dfb4492b30faf67bd22abe.tar.gz external_llvm-bba534dc6676fa6a91dfb4492b30faf67bd22abe.tar.bz2 |
Make llvm.frame/returnaddr not crash on ppc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25710 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 7 | ||||
-rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.h | 4 |
2 files changed, 0 insertions, 11 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index f1c1735..b8094d7 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -862,13 +862,6 @@ PPCTargetLowering::LowerCallTo(SDOperand Chain, return std::make_pair(RetVal, Chain); } -std::pair<SDOperand, SDOperand> PPCTargetLowering:: -LowerFrameReturnAddress(bool isFrameAddress, SDOperand Chain, unsigned Depth, - SelectionDAG &DAG) { - assert(0 && "LowerFrameReturnAddress unimplemented"); - abort(); -} - MachineBasicBlock * PPCTargetLowering::InsertAtEndOfBasicBlock(MachineInstr *MI, MachineBasicBlock *BB) { diff --git a/lib/Target/PowerPC/PPCISelLowering.h b/lib/Target/PowerPC/PPCISelLowering.h index fe4a821..9170514 100644 --- a/lib/Target/PowerPC/PPCISelLowering.h +++ b/lib/Target/PowerPC/PPCISelLowering.h @@ -91,10 +91,6 @@ namespace llvm { bool isTailCall, SDOperand Callee, ArgListTy &Args, SelectionDAG &DAG); - virtual std::pair<SDOperand, SDOperand> - LowerFrameReturnAddress(bool isFrameAddr, SDOperand Chain, unsigned Depth, - SelectionDAG &DAG); - virtual MachineBasicBlock *InsertAtEndOfBasicBlock(MachineInstr *MI, MachineBasicBlock *MBB); }; |