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authorKevin Enderby <enderby@apple.com>2012-04-18 23:12:11 +0000
committerKevin Enderby <enderby@apple.com>2012-04-18 23:12:11 +0000
commitc007eff5365d4216bcb243a3eea9c372267d0964 (patch)
tree0f7fa0732798dbbbf591685c409e4d541a2cdd90 /lib
parent3b5b2a22ca8f5eddcaf322bdff4d0ad5ba342676 (diff)
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Fixed the llvm-mv X86 disassembler so the 'C' API gets jumps properly
symbolicated. These have and operand type of TYPE_RELv which was not handled as isBranch in translateImmediate() in X86Disassembler.cpp. rdar://11268426 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155074 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Target/X86/Disassembler/X86Disassembler.cpp7
1 files changed, 5 insertions, 2 deletions
diff --git a/lib/Target/X86/Disassembler/X86Disassembler.cpp b/lib/Target/X86/Disassembler/X86Disassembler.cpp
index 8278bde..b13a006 100644
--- a/lib/Target/X86/Disassembler/X86Disassembler.cpp
+++ b/lib/Target/X86/Disassembler/X86Disassembler.cpp
@@ -322,7 +322,12 @@ static void translateImmediate(MCInst &mcInst, uint64_t immediate,
OperandType type = (OperandType)operand.type;
+ bool isBranch = false;
+ uint64_t pcrel = 0;
if (type == TYPE_RELv) {
+ isBranch = true;
+ pcrel = insn.startLocation +
+ insn.displacementOffset + insn.displacementSize;
switch (insn.displacementSize) {
default:
break;
@@ -373,8 +378,6 @@ static void translateImmediate(MCInst &mcInst, uint64_t immediate,
}
}
- bool isBranch = false;
- uint64_t pcrel = 0;
switch (type) {
case TYPE_XMM128:
mcInst.addOperand(MCOperand::CreateReg(X86::XMM0 + (immediate >> 4)));