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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2013-11-15 22:02:28 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2013-11-15 22:02:28 +0000 |
| commit | c3ec7e2273a26d8ae3b8d98160e13f8f44299ad2 (patch) | |
| tree | 3dc54b40577a44e00e8ec3594c40bc0de59dd5a7 /lib | |
| parent | 4303b091d0b0c4982efde6f575f4dfd72ff14c42 (diff) | |
| download | external_llvm-c3ec7e2273a26d8ae3b8d98160e13f8f44299ad2.zip external_llvm-c3ec7e2273a26d8ae3b8d98160e13f8f44299ad2.tar.gz external_llvm-c3ec7e2273a26d8ae3b8d98160e13f8f44299ad2.tar.bz2 | |
Make method static
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194858 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/R600/SIInstrInfo.cpp | 2 | ||||
| -rw-r--r-- | lib/Target/R600/SIInstrInfo.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/R600/SIInstrInfo.cpp b/lib/Target/R600/SIInstrInfo.cpp index b5203a8..11710b4 100644 --- a/lib/Target/R600/SIInstrInfo.cpp +++ b/lib/Target/R600/SIInstrInfo.cpp @@ -367,7 +367,7 @@ bool SIInstrInfo::verifyInstruction(const MachineInstr *MI, return true; } -unsigned SIInstrInfo::getVALUOp(const MachineInstr &MI) const { +unsigned SIInstrInfo::getVALUOp(const MachineInstr &MI) { switch (MI.getOpcode()) { default: return AMDGPU::INSTRUCTION_LIST_END; case AMDGPU::REG_SEQUENCE: return AMDGPU::REG_SEQUENCE; diff --git a/lib/Target/R600/SIInstrInfo.h b/lib/Target/R600/SIInstrInfo.h index 84ebc96..4af6348 100644 --- a/lib/Target/R600/SIInstrInfo.h +++ b/lib/Target/R600/SIInstrInfo.h @@ -68,7 +68,7 @@ public: StringRef &ErrInfo) const; bool isSALUInstr(const MachineInstr &MI) const; - unsigned getVALUOp(const MachineInstr &MI) const; + static unsigned getVALUOp(const MachineInstr &MI); bool isSALUOpSupportedOnVALU(const MachineInstr &MI) const; /// \brief Return the correct register class for \p OpNo. For target-specific |