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authorJakob Stoklund Olesen <stoklund@2pi.dk>2011-03-16 22:56:08 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2011-03-16 22:56:08 +0000
commitc46570dc05851395829bef904bb6ddb1260400d1 (patch)
tree179a2496f8f6beed6e7129a59a84a99c04760a6d /lib
parentebe8173941238cfbabadb1c63bca7fb7dcf2adbe (diff)
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Clarify debugging output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127771 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/CodeGen/LiveIntervalAnalysis.cpp4
-rw-r--r--lib/CodeGen/LiveRangeEdit.cpp10
-rw-r--r--lib/CodeGen/RegAllocGreedy.cpp10
3 files changed, 17 insertions, 7 deletions
diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp
index 8bdc8e3..f2bf917 100644
--- a/lib/CodeGen/LiveIntervalAnalysis.cpp
+++ b/lib/CodeGen/LiveIntervalAnalysis.cpp
@@ -854,7 +854,7 @@ void LiveIntervals::shrinkToUses(LiveInterval *li,
assert(MI && "No instruction defining live value");
MI->addRegisterDead(li->reg, tri_);
if (dead && MI->allDefsAreDead()) {
- DEBUG(dbgs() << "All defs dead: " << *MI);
+ DEBUG(dbgs() << "All defs dead: " << VNI->def << '\t' << *MI);
dead->push_back(MI);
}
}
@@ -862,7 +862,7 @@ void LiveIntervals::shrinkToUses(LiveInterval *li,
// Move the trimmed ranges back.
li->ranges.swap(NewLI.ranges);
- DEBUG(dbgs() << "Shrink: " << *li << '\n');
+ DEBUG(dbgs() << "Shrunk: " << *li << '\n');
}
diff --git a/lib/CodeGen/LiveRangeEdit.cpp b/lib/CodeGen/LiveRangeEdit.cpp
index c9985cd..0769f95 100644
--- a/lib/CodeGen/LiveRangeEdit.cpp
+++ b/lib/CodeGen/LiveRangeEdit.cpp
@@ -148,17 +148,21 @@ void LiveRangeEdit::eliminateDeadDefs(SmallVectorImpl<MachineInstr*> &Dead,
while (!Dead.empty()) {
MachineInstr *MI = Dead.pop_back_val();
assert(MI->allDefsAreDead() && "Def isn't really dead");
+ SlotIndex Idx = LIS.getInstructionIndex(MI).getDefIndex();
// Never delete inline asm.
- if (MI->isInlineAsm())
+ if (MI->isInlineAsm()) {
+ DEBUG(dbgs() << "Won't delete: " << Idx << '\t' << *MI);
continue;
+ }
// Use the same criteria as DeadMachineInstructionElim.
bool SawStore = false;
- if (!MI->isSafeToMove(&TII, 0, SawStore))
+ if (!MI->isSafeToMove(&TII, 0, SawStore)) {
+ DEBUG(dbgs() << "Can't delete: " << Idx << '\t' << *MI);
continue;
+ }
- SlotIndex Idx = LIS.getInstructionIndex(MI).getDefIndex();
DEBUG(dbgs() << "Deleting dead def " << Idx << '\t' << *MI);
// Check for live intervals that may shrink
diff --git a/lib/CodeGen/RegAllocGreedy.cpp b/lib/CodeGen/RegAllocGreedy.cpp
index 57119aa..940ed81 100644
--- a/lib/CodeGen/RegAllocGreedy.cpp
+++ b/lib/CodeGen/RegAllocGreedy.cpp
@@ -646,7 +646,9 @@ void RAGreedy::splitAroundRegion(LiveInterval &VirtReg, unsigned PhysReg,
IndexPair &IP = InterferenceRanges[i];
DEBUG(dbgs() << "BB#" << BI.MBB->getNumber() << " -> EB#"
<< Bundles->getBundle(BI.MBB->getNumber(), 1)
- << " intf [" << IP.first << ';' << IP.second << ')');
+ << " [" << BI.Start << ';' << BI.LastSplitPoint << '-'
+ << BI.Stop << ") intf [" << IP.first << ';' << IP.second
+ << ')');
// The interference interval should either be invalid or overlap MBB.
assert((!IP.first.isValid() || IP.first < BI.Stop) && "Bad interference");
@@ -741,7 +743,8 @@ void RAGreedy::splitAroundRegion(LiveInterval &VirtReg, unsigned PhysReg,
IndexPair &IP = InterferenceRanges[i];
DEBUG(dbgs() << "EB#" << Bundles->getBundle(BI.MBB->getNumber(), 0)
- << " -> BB#" << BI.MBB->getNumber());
+ << " -> BB#" << BI.MBB->getNumber() << " [" << BI.Start << ';'
+ << BI.LastSplitPoint << '-' << BI.Stop << ')');
// Check interference entering the block.
if (!IP.first.isValid()) {
@@ -1266,6 +1269,9 @@ unsigned RAGreedy::selectOrSplit(LiveInterval &VirtReg,
LiveRangeEdit LRE(VirtReg, NewVRegs, this);
spiller().spill(LRE);
+ if (VerifyEnabled)
+ MF->verify(this, "After spilling");
+
// The live virtual register requesting allocation was spilled, so tell
// the caller not to allocate anything during this round.
return 0;