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| author | Justin Holewinski <jholewinski@nvidia.com> | 2012-05-24 21:38:21 +0000 |
|---|---|---|
| committer | Justin Holewinski <jholewinski@nvidia.com> | 2012-05-24 21:38:21 +0000 |
| commit | 42a0b48dd3773574f648c19b4d9abafb6b4a4f16 (patch) | |
| tree | d9a4399f281c81c89d9a5118795d64fb1d4893f9 /projects | |
| parent | 6b31d4ea3610b04d71e1eb38d8fc625eae7b759a (diff) | |
| download | external_llvm-42a0b48dd3773574f648c19b4d9abafb6b4a4f16.zip external_llvm-42a0b48dd3773574f648c19b4d9abafb6b4a4f16.tar.gz external_llvm-42a0b48dd3773574f648c19b4d9abafb6b4a4f16.tar.bz2 | |
Remove the PTX back-end and all of its artifacts (triple, etc.)
This back-end was deprecated in favor of the NVPTX back-end.
NV_CONTRIB
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157417 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'projects')
| -rw-r--r-- | projects/sample/autoconf/configure.ac | 8 | ||||
| -rwxr-xr-x | projects/sample/configure | 12 |
2 files changed, 5 insertions, 15 deletions
diff --git a/projects/sample/autoconf/configure.ac b/projects/sample/autoconf/configure.ac index e5a4b35..092bc68 100644 --- a/projects/sample/autoconf/configure.ac +++ b/projects/sample/autoconf/configure.ac @@ -309,7 +309,6 @@ AC_CACHE_CHECK([target architecture],[llvm_cv_target_arch], msp430-*) llvm_cv_target_arch="MSP430" ;; hexagon-*) llvm_cv_target_arch="Hexagon" ;; mblaze-*) llvm_cv_target_arch="MBlaze" ;; - ptx-*) llvm_cv_target_arch="PTX" ;; nvptx-*) llvm_cv_target_arch="NVPTX" ;; *) llvm_cv_target_arch="Unknown" ;; esac]) @@ -457,7 +456,6 @@ else MSP430) AC_SUBST(TARGET_HAS_JIT,0) ;; Hexagon) AC_SUBST(TARGET_HAS_JIT,0) ;; MBlaze) AC_SUBST(TARGET_HAS_JIT,0) ;; - PTX) AC_SUBST(TARGET_HAS_JIT,0) ;; NVPTX) AC_SUBST(TARGET_HAS_JIT,0) ;; *) AC_SUBST(TARGET_HAS_JIT,0) ;; esac @@ -569,13 +567,13 @@ TARGETS_TO_BUILD="" AC_ARG_ENABLE([targets],AS_HELP_STRING([--enable-targets], [Build specific host targets: all or target1,target2,... Valid targets are: host, x86, x86_64, sparc, powerpc, arm, mips, spu, hexagon, - xcore, msp430, ptx, nvptx, cbe, and cpp (default=all)]),, + xcore, msp430, nvptx, cbe, and cpp (default=all)]),, enableval=all) if test "$enableval" = host-only ; then enableval=host fi case "$enableval" in - all) TARGETS_TO_BUILD="X86 Sparc PowerPC ARM Mips CellSPU XCore MSP430 Hexagon CppBackend MBlaze PTX NVPTX" ;; + all) TARGETS_TO_BUILD="X86 Sparc PowerPC ARM Mips CellSPU XCore MSP430 Hexagon CppBackend MBlaze NVPTX" ;; *)for a_target in `echo $enableval|sed -e 's/,/ /g' ` ; do case "$a_target" in x86) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;; @@ -590,7 +588,6 @@ case "$enableval" in hexagon) TARGETS_TO_BUILD="Hexagon $TARGETS_TO_BUILD" ;; cpp) TARGETS_TO_BUILD="CppBackend $TARGETS_TO_BUILD" ;; mblaze) TARGETS_TO_BUILD="MBlaze $TARGETS_TO_BUILD" ;; - ptx) TARGETS_TO_BUILD="PTX $TARGETS_TO_BUILD" ;; nvptx) TARGETS_TO_BUILD="NVPTX $TARGETS_TO_BUILD" ;; host) case "$llvm_cv_target_arch" in x86) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;; @@ -604,7 +601,6 @@ case "$enableval" in XCore) TARGETS_TO_BUILD="XCore $TARGETS_TO_BUILD" ;; MSP430) TARGETS_TO_BUILD="MSP430 $TARGETS_TO_BUILD" ;; Hexagon) TARGETS_TO_BUILD="Hexagon $TARGETS_TO_BUILD" ;; - PTX) TARGETS_TO_BUILD="PTX $TARGETS_TO_BUILD" ;; NVPTX) TARGETS_TO_BUILD="NVPTX $TARGETS_TO_BUILD" ;; *) AC_MSG_ERROR([Can not set target to build]) ;; esac ;; diff --git a/projects/sample/configure b/projects/sample/configure index a54e153..d925888 100755 --- a/projects/sample/configure +++ b/projects/sample/configure @@ -1402,8 +1402,7 @@ Optional Features: --enable-targets Build specific host targets: all or target1,target2,... Valid targets are: host, x86, x86_64, sparc, powerpc, arm, mips, spu, hexagon, - xcore, msp430, ptx, nvptx, cbe, and cpp - (default=all) + xcore, msp430, nvptx, cbe, and cpp (default=all) --enable-bindings Build specific language bindings: all,auto,none,{binding-name} (default=auto) --enable-libffi Check for the presence of libffi (default is NO) @@ -3846,7 +3845,6 @@ else msp430-*) llvm_cv_target_arch="MSP430" ;; hexagon-*) llvm_cv_target_arch="Hexagon" ;; mblaze-*) llvm_cv_target_arch="MBlaze" ;; - ptx-*) llvm_cv_target_arch="PTX" ;; nvptx-*) llvm_cv_target_arch="NVPTX" ;; *) llvm_cv_target_arch="Unknown" ;; esac @@ -5070,8 +5068,6 @@ else ;; MBlaze) TARGET_HAS_JIT=0 ;; - PTX) TARGET_HAS_JIT=0 - ;; NVPTX) TARGET_HAS_JIT=0 ;; *) TARGET_HAS_JIT=0 @@ -5258,7 +5254,7 @@ if test "$enableval" = host-only ; then enableval=host fi case "$enableval" in - all) TARGETS_TO_BUILD="X86 Sparc PowerPC ARM Mips CellSPU XCore MSP430 Hexagon CppBackend MBlaze PTX NVPTX" ;; + all) TARGETS_TO_BUILD="X86 Sparc PowerPC ARM Mips CellSPU XCore MSP430 Hexagon CppBackend MBlaze NVPTX" ;; *)for a_target in `echo $enableval|sed -e 's/,/ /g' ` ; do case "$a_target" in x86) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;; @@ -5273,7 +5269,6 @@ case "$enableval" in hexagon) TARGETS_TO_BUILD="Hexagon $TARGETS_TO_BUILD" ;; cpp) TARGETS_TO_BUILD="CppBackend $TARGETS_TO_BUILD" ;; mblaze) TARGETS_TO_BUILD="MBlaze $TARGETS_TO_BUILD" ;; - ptx) TARGETS_TO_BUILD="PTX $TARGETS_TO_BUILD" ;; nvptx) TARGETS_TO_BUILD="NVPTX $TARGETS_TO_BUILD" ;; host) case "$llvm_cv_target_arch" in x86) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;; @@ -5287,7 +5282,6 @@ case "$enableval" in XCore) TARGETS_TO_BUILD="XCore $TARGETS_TO_BUILD" ;; MSP430) TARGETS_TO_BUILD="MSP430 $TARGETS_TO_BUILD" ;; Hexagon) TARGETS_TO_BUILD="Hexagon $TARGETS_TO_BUILD" ;; - PTX) TARGETS_TO_BUILD="PTX $TARGETS_TO_BUILD" ;; NVPTX) TARGETS_TO_BUILD="NVPTX $TARGETS_TO_BUILD" ;; *) { { echo "$as_me:$LINENO: error: Can not set target to build" >&5 echo "$as_me: error: Can not set target to build" >&2;} @@ -10313,7 +10307,7 @@ else lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext <<EOF -#line 10316 "configure" +#line 10310 "configure" #include "confdefs.h" #if HAVE_DLFCN_H |