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author | Vikram S. Adve <vadve@cs.uiuc.edu> | 2002-07-08 23:15:32 +0000 |
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committer | Vikram S. Adve <vadve@cs.uiuc.edu> | 2002-07-08 23:15:32 +0000 |
commit | f5af636dbeb516e2d929e026d997841ffb431948 (patch) | |
tree | c6f77696f4d836eb4b585fd569e0e72e47efb514 /support/lib/Support | |
parent | c9a0ca5171f8244270310a757a13190d5555c6bf (diff) | |
download | external_llvm-f5af636dbeb516e2d929e026d997841ffb431948.zip external_llvm-f5af636dbeb516e2d929e026d997841ffb431948.tar.gz external_llvm-f5af636dbeb516e2d929e026d997841ffb431948.tar.bz2 |
Significant changes to correctly spill CC registers and to correctly
handle conditional move instructions:
-- cpMem<->Reg functions now support CC registers (int and FP) correctly.
-- Scratch registers must be explicitly provided to cpMem<->Reg when
needed, since CC regs need one to be copied to/from memory.
-- CC regs are saved to a scratch register instead of stack.
-- All regs used by a instruction are now recorded in MachineInstr::regsUsed,
since regs used to save values *across* an instruction are not obvious
either from the operands or from the LiveVar sets.
-- An (explicit or implicit) operand may now be both a def and a use.
This is needed for conditional move operations.
So an operand may need spill code both before and after the instruction.
-- class MachineCodeForBasicBlock is now an annotation on BasicBlock.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2833 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'support/lib/Support')
0 files changed, 0 insertions, 0 deletions