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authorChris Lattner <sabre@nondot.org>2003-08-03 21:58:28 +0000
committerChris Lattner <sabre@nondot.org>2003-08-03 21:58:28 +0000
commit15de32d706287e1457ab26b74d731f5367083b99 (patch)
tree674492574d55b019afe40392c16277d5745ab4b0 /support/tools/TableGen
parent0969c5bdf2de91fc03480dba86bcb6ce76612d8b (diff)
downloadexternal_llvm-15de32d706287e1457ab26b74d731f5367083b99.zip
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add new --gen-instr-desc option
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7545 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'support/tools/TableGen')
-rw-r--r--support/tools/TableGen/TableGen.cpp7
1 files changed, 6 insertions, 1 deletions
diff --git a/support/tools/TableGen/TableGen.cpp b/support/tools/TableGen/TableGen.cpp
index 990e2b3..8a22c54 100644
--- a/support/tools/TableGen/TableGen.cpp
+++ b/support/tools/TableGen/TableGen.cpp
@@ -22,7 +22,7 @@ enum ActionType {
PrintRecords,
GenEmitter,
GenRegisterEnums, GenRegister, GenRegisterHeader,
- GenInstrEnums,
+ GenInstrEnums, GenInstrs,
PrintEnums,
Parse,
};
@@ -42,6 +42,8 @@ namespace {
"Generate a register info description header"),
clEnumValN(GenInstrEnums, "gen-instr-enums",
"Generate enum values for instructions"),
+ clEnumValN(GenInstrs, "gen-instr-desc",
+ "Generate instruction descriptions"),
clEnumValN(PrintEnums, "print-enums",
"Print enum values for a class"),
clEnumValN(Parse, "parse",
@@ -435,6 +437,9 @@ int main(int argc, char **argv) {
case GenInstrEnums:
InstrInfoEmitter(Records).runEnums(*Out);
break;
+ case GenInstrs:
+ InstrInfoEmitter(Records).run(*Out);
+ break;
case PrintEnums:
std::vector<Record*> Recs = Records.getAllDerivedDefinitions(Class);