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| author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-10 22:08:18 +0000 |
|---|---|---|
| committer | Android Git Automerger <android-git-automerger@android.com> | 2015-04-10 22:08:18 +0000 |
| commit | 13a7db5b9c4f5e543d037be68ec3428216bfd550 (patch) | |
| tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/Analysis/ScalarEvolution/nowrap-preinc-limits.ll | |
| parent | 0eb46f5d1e06a4284663d636a74b06adc3a161d7 (diff) | |
| parent | 31195f0bdca6ee2a5e72d07edf13e1d81206d949 (diff) | |
| download | external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.zip external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.gz external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.bz2 | |
am 31195f0b: Merge "Update aosp/master llvm for rebase to r233350"
* commit '31195f0bdca6ee2a5e72d07edf13e1d81206d949':
Update aosp/master llvm for rebase to r233350
Diffstat (limited to 'test/Analysis/ScalarEvolution/nowrap-preinc-limits.ll')
| -rw-r--r-- | test/Analysis/ScalarEvolution/nowrap-preinc-limits.ll | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/test/Analysis/ScalarEvolution/nowrap-preinc-limits.ll b/test/Analysis/ScalarEvolution/nowrap-preinc-limits.ll new file mode 100644 index 0000000..1a5409d --- /dev/null +++ b/test/Analysis/ScalarEvolution/nowrap-preinc-limits.ll @@ -0,0 +1,44 @@ +; RUN: opt -analyze -scalar-evolution < %s | FileCheck %s + +define void @f(i1* %condition) { +; CHECK-LABEL: Classifying expressions for: @f + entry: + br label %loop + + loop: + %idx = phi i32 [ 0, %entry ], [ %idx.inc, %loop ] + %idx.inc = add nsw i32 %idx, 1 + + %idx.inc2 = add i32 %idx.inc, 1 + %idx.inc2.zext = zext i32 %idx.inc2 to i64 + +; CHECK: %idx.inc2.zext = zext i32 %idx.inc2 to i64 +; CHECK-NEXT: --> {2,+,1}<nuw><%loop> + + %c = load volatile i1, i1* %condition + br i1 %c, label %loop, label %exit + + exit: + ret void +} + +define void @g(i1* %condition) { +; CHECK-LABEL: Classifying expressions for: @g + entry: + br label %loop + + loop: + %idx = phi i32 [ 0, %entry ], [ %idx.inc, %loop ] + %idx.inc = add nsw i32 %idx, 3 + + %idx.inc2 = add i32 %idx.inc, -1 + %idx.inc2.sext = sext i32 %idx.inc2 to i64 +; CHECK: %idx.inc2.sext = sext i32 %idx.inc2 to i64 +; CHECK-NEXT: --> {2,+,3}<nuw><nsw><%loop> + + %c = load volatile i1, i1* %condition + br i1 %c, label %loop, label %exit + + exit: + ret void +} |