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authorPirama Arumuga Nainar <pirama@google.com>2015-04-10 22:08:18 +0000
committerAndroid Git Automerger <android-git-automerger@android.com>2015-04-10 22:08:18 +0000
commit13a7db5b9c4f5e543d037be68ec3428216bfd550 (patch)
tree1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/Analysis/ScalarEvolution/nsw.ll
parent0eb46f5d1e06a4284663d636a74b06adc3a161d7 (diff)
parent31195f0bdca6ee2a5e72d07edf13e1d81206d949 (diff)
downloadexternal_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.zip
external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.gz
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am 31195f0b: Merge "Update aosp/master llvm for rebase to r233350"
* commit '31195f0bdca6ee2a5e72d07edf13e1d81206d949': Update aosp/master llvm for rebase to r233350
Diffstat (limited to 'test/Analysis/ScalarEvolution/nsw.ll')
-rw-r--r--test/Analysis/ScalarEvolution/nsw.ll30
1 files changed, 15 insertions, 15 deletions
diff --git a/test/Analysis/ScalarEvolution/nsw.ll b/test/Analysis/ScalarEvolution/nsw.ll
index d776a5a..15444e3 100644
--- a/test/Analysis/ScalarEvolution/nsw.ll
+++ b/test/Analysis/ScalarEvolution/nsw.ll
@@ -7,7 +7,7 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64"
; CHECK: Classifying expressions for: @test1
define void @test1(double* %p) nounwind {
entry:
- %tmp = load double* %p, align 8 ; <double> [#uses=1]
+ %tmp = load double, double* %p, align 8 ; <double> [#uses=1]
%tmp1 = fcmp ogt double %tmp, 2.000000e+00 ; <i1> [#uses=1]
br i1 %tmp1, label %bb.nph, label %return
@@ -19,11 +19,11 @@ bb: ; preds = %bb1, %bb.nph
; CHECK: %i.01
; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%bb>
%tmp2 = sext i32 %i.01 to i64 ; <i64> [#uses=1]
- %tmp3 = getelementptr double* %p, i64 %tmp2 ; <double*> [#uses=1]
- %tmp4 = load double* %tmp3, align 8 ; <double> [#uses=1]
+ %tmp3 = getelementptr double, double* %p, i64 %tmp2 ; <double*> [#uses=1]
+ %tmp4 = load double, double* %tmp3, align 8 ; <double> [#uses=1]
%tmp5 = fmul double %tmp4, 9.200000e+00 ; <double> [#uses=1]
%tmp6 = sext i32 %i.01 to i64 ; <i64> [#uses=1]
- %tmp7 = getelementptr double* %p, i64 %tmp6 ; <double*> [#uses=1]
+ %tmp7 = getelementptr double, double* %p, i64 %tmp6 ; <double*> [#uses=1]
; CHECK: %tmp7
; CHECK-NEXT: --> {%p,+,8}<%bb>
store double %tmp5, double* %tmp7, align 8
@@ -36,10 +36,10 @@ bb1: ; preds = %bb
%phitmp = sext i32 %tmp8 to i64 ; <i64> [#uses=1]
; CHECK: %phitmp
; CHECK-NEXT: --> {1,+,1}<nuw><nsw><%bb>
- %tmp9 = getelementptr double* %p, i64 %phitmp ; <double*> [#uses=1]
+ %tmp9 = getelementptr double, double* %p, i64 %phitmp ; <double*> [#uses=1]
; CHECK: %tmp9
; CHECK-NEXT: --> {(8 + %p),+,8}<%bb>
- %tmp10 = load double* %tmp9, align 8 ; <double> [#uses=1]
+ %tmp10 = load double, double* %tmp9, align 8 ; <double> [#uses=1]
%tmp11 = fcmp ogt double %tmp10, 2.000000e+00 ; <i1> [#uses=1]
br i1 %tmp11, label %bb, label %bb1.return_crit_edge
@@ -64,7 +64,7 @@ for.body.i.i: ; preds = %for.body.i.i, %for.
; CHECK: %__first.addr.02.i.i
; CHECK-NEXT: --> {%begin,+,4}<nuw><%for.body.i.i>
store i32 0, i32* %__first.addr.02.i.i, align 4
- %ptrincdec.i.i = getelementptr inbounds i32* %__first.addr.02.i.i, i64 1
+ %ptrincdec.i.i = getelementptr inbounds i32, i32* %__first.addr.02.i.i, i64 1
; CHECK: %ptrincdec.i.i
; CHECK-NEXT: --> {(4 + %begin),+,4}<nuw><%for.body.i.i>
%cmp.i.i = icmp eq i32* %ptrincdec.i.i, %end
@@ -90,10 +90,10 @@ for.body.i.i: ; preds = %entry, %for.body.i.
%tmp = add nsw i64 %indvar.i.i, 1
; CHECK: %tmp =
; CHECK: {1,+,1}<nuw><nsw><%for.body.i.i>
- %ptrincdec.i.i = getelementptr inbounds i32* %begin, i64 %tmp
+ %ptrincdec.i.i = getelementptr inbounds i32, i32* %begin, i64 %tmp
; CHECK: %ptrincdec.i.i =
; CHECK: {(4 + %begin),+,4}<nsw><%for.body.i.i>
- %__first.addr.08.i.i = getelementptr inbounds i32* %begin, i64 %indvar.i.i
+ %__first.addr.08.i.i = getelementptr inbounds i32, i32* %begin, i64 %indvar.i.i
; CHECK: %__first.addr.08.i.i
; CHECK: {%begin,+,4}<nsw><%for.body.i.i>
store i32 0, i32* %__first.addr.08.i.i, align 4
@@ -124,17 +124,17 @@ exit:
}
; CHECK-LABEL: PR12375
-; CHECK: --> {(4 + %arg),+,4}<nuw><%bb1> Exits: (8 + %arg)<nsw>
+; CHECK: --> {(4 + %arg),+,4}<nuw><%bb1>{{ U: [^ ]+ S: [^ ]+}}{{ *}}Exits: (8 + %arg)<nsw>
define i32 @PR12375(i32* readnone %arg) {
bb:
- %tmp = getelementptr inbounds i32* %arg, i64 2
+ %tmp = getelementptr inbounds i32, i32* %arg, i64 2
br label %bb1
bb1: ; preds = %bb1, %bb
%tmp2 = phi i32* [ %arg, %bb ], [ %tmp5, %bb1 ]
%tmp3 = phi i32 [ 0, %bb ], [ %tmp4, %bb1 ]
%tmp4 = add nsw i32 %tmp3, 1
- %tmp5 = getelementptr inbounds i32* %tmp2, i64 1
+ %tmp5 = getelementptr inbounds i32, i32* %tmp2, i64 1
%tmp6 = icmp ult i32* %tmp5, %tmp
br i1 %tmp6, label %bb1, label %bb7
@@ -143,7 +143,7 @@ bb7: ; preds = %bb1
}
; CHECK-LABEL: PR12376
-; CHECK: --> {(4 + %arg),+,4}<nuw><%bb2> Exits: (4 + (4 * ((3 + (-1 * %arg) + (%arg umax %arg1)) /u 4)) + %arg)
+; CHECK: --> {(4 + %arg),+,4}<nuw><%bb2>{{ U: [^ ]+ S: [^ ]+}}{{ *}}Exits: (4 + (4 * ((3 + (-1 * %arg) + (%arg umax %arg1)) /u 4)) + %arg)
define void @PR12376(i32* nocapture %arg, i32* nocapture %arg1) {
bb:
br label %bb2
@@ -151,7 +151,7 @@ bb:
bb2: ; preds = %bb2, %bb
%tmp = phi i32* [ %arg, %bb ], [ %tmp4, %bb2 ]
%tmp3 = icmp ult i32* %tmp, %arg1
- %tmp4 = getelementptr inbounds i32* %tmp, i64 1
+ %tmp4 = getelementptr inbounds i32, i32* %tmp, i64 1
br i1 %tmp3, label %bb2, label %bb5
bb5: ; preds = %bb2
@@ -161,7 +161,7 @@ bb5: ; preds = %bb2
declare void @f(i32)
; CHECK-LABEL: nswnowrap
-; CHECK: --> {(1 + %v),+,1}<nsw><%for.body> Exits: (2 + %v)
+; CHECK: --> {(1 + %v),+,1}<nsw><%for.body>{{ U: [^ ]+ S: [^ ]+}}{{ *}}Exits: (2 + %v)
define void @nswnowrap(i32 %v) {
entry:
%add = add nsw i32 %v, 1