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| author | Bill Wendling <isanbard@gmail.com> | 2013-02-22 09:09:42 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2013-02-22 09:09:42 +0000 |
| commit | 351b7a10e2560a835759748c58da09e53207b39d (patch) | |
| tree | 9e96a49def7e558db064f4bcbc0ff8e22dfb7dcf /test/Analysis | |
| parent | 00ddc5a7274fb4131f1a724bc350fd756156a80f (diff) | |
| download | external_llvm-351b7a10e2560a835759748c58da09e53207b39d.zip external_llvm-351b7a10e2560a835759748c58da09e53207b39d.tar.gz external_llvm-351b7a10e2560a835759748c58da09e53207b39d.tar.bz2 | |
Use references to attribute groups on the call/invoke instructions.
Listing all of the attributes for the callee of a call/invoke instruction is way
too much and makes the IR unreadable. Use references to attributes instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175877 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/Analysis')
| -rw-r--r-- | test/Analysis/BasicAA/intrinsics.ll | 6 | ||||
| -rw-r--r-- | test/Analysis/BasicAA/pure-const-dce.ll | 10 | ||||
| -rw-r--r-- | test/Analysis/TypeBasedAliasAnalysis/intrinsics.ll | 4 |
3 files changed, 10 insertions, 10 deletions
diff --git a/test/Analysis/BasicAA/intrinsics.ll b/test/Analysis/BasicAA/intrinsics.ll index 1407efe..c1cf587 100644 --- a/test/Analysis/BasicAA/intrinsics.ll +++ b/test/Analysis/BasicAA/intrinsics.ll @@ -7,7 +7,7 @@ target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32- ; CHECK: define <8 x i16> @test0(i8* noalias %p, i8* noalias %q, <8 x i16> %y) { ; CHECK-NEXT: entry: -; CHECK-NEXT: %a = call <8 x i16> @llvm.arm.neon.vld1.v8i16(i8* %p, i32 16) nounwind +; CHECK-NEXT: %a = call <8 x i16> @llvm.arm.neon.vld1.v8i16(i8* %p, i32 16) [[ATTR:#[0-9]+]] ; CHECK-NEXT: call void @llvm.arm.neon.vst1.v8i16(i8* %q, <8 x i16> %y, i32 16) ; CHECK-NEXT: %c = add <8 x i16> %a, %a define <8 x i16> @test0(i8* noalias %p, i8* noalias %q, <8 x i16> %y) { @@ -22,7 +22,7 @@ entry: ; CHECK: define <8 x i16> @test1(i8* %p, <8 x i16> %y) { ; CHECK-NEXT: entry: ; CHECK-NEXT: %q = getelementptr i8* %p, i64 16 -; CHECK-NEXT: %a = call <8 x i16> @llvm.arm.neon.vld1.v8i16(i8* %p, i32 16) nounwind +; CHECK-NEXT: %a = call <8 x i16> @llvm.arm.neon.vld1.v8i16(i8* %p, i32 16) [[ATTR]] ; CHECK-NEXT: call void @llvm.arm.neon.vst1.v8i16(i8* %q, <8 x i16> %y, i32 16) ; CHECK-NEXT: %c = add <8 x i16> %a, %a define <8 x i16> @test1(i8* %p, <8 x i16> %y) { @@ -39,4 +39,4 @@ declare <8 x i16> @llvm.arm.neon.vld1.v8i16(i8*, i32) nounwind readonly declare void @llvm.arm.neon.vst1.v8i16(i8*, <8 x i16>, i32) nounwind ; CHECK: attributes #0 = { nounwind readonly } -; CHECK: attributes #1 = { nounwind } +; CHECK: attributes [[ATTR]] = { nounwind } diff --git a/test/Analysis/BasicAA/pure-const-dce.ll b/test/Analysis/BasicAA/pure-const-dce.ll index abdd7d3..e489928 100644 --- a/test/Analysis/BasicAA/pure-const-dce.ll +++ b/test/Analysis/BasicAA/pure-const-dce.ll @@ -4,11 +4,11 @@ ; CHECK: @test ; CHECK: entry -; CHECK: %tmp0 = call i32 @TestConst(i32 5) readnone -; CHECK-NEXT: %tmp1 = call i32 @TestPure(i32 6) readonly +; CHECK: %tmp0 = call i32 @TestConst(i32 5) [[READNONE:#[0-9]+]] +; CHECK-NEXT: %tmp1 = call i32 @TestPure(i32 6) [[READONLY:#[0-9]+]] ; CHECK-NEXT: %tmp2 = call i32 @TestNone(i32 7) ; CHECK-NEXT: store i32 1, i32* @g -; CHECK-NEXT: %tmp5 = call i32 @TestPure(i32 6) readonly +; CHECK-NEXT: %tmp5 = call i32 @TestPure(i32 6) [[READONLY]] ; CHECK-NEXT: %tmp7 = call i32 @TestNone(i32 7) ; CHECK-NEXT: %tmp8 = call i32 @TestNone(i32 7) ; CHECK-NEXT: %sum0 = add i32 %tmp0, %tmp1 @@ -50,5 +50,5 @@ declare i32 @TestPure(i32) readonly declare i32 @TestNone(i32) -; CHECK: attributes #0 = { readnone } -; CHECK: attributes #1 = { readonly } +; CHECK: attributes [[READNONE]] = { readnone } +; CHECK: attributes [[READONLY]] = { readonly } diff --git a/test/Analysis/TypeBasedAliasAnalysis/intrinsics.ll b/test/Analysis/TypeBasedAliasAnalysis/intrinsics.ll index e1d91ca..6f1c22d 100644 --- a/test/Analysis/TypeBasedAliasAnalysis/intrinsics.ll +++ b/test/Analysis/TypeBasedAliasAnalysis/intrinsics.ll @@ -7,7 +7,7 @@ target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32- ; CHECK: define <8 x i16> @test0(i8* %p, i8* %q, <8 x i16> %y) { ; CHECK-NEXT: entry: -; CHECK-NEXT: %a = call <8 x i16> @llvm.arm.neon.vld1.v8i16(i8* %p, i32 16) nounwind +; CHECK-NEXT: %a = call <8 x i16> @llvm.arm.neon.vld1.v8i16(i8* %p, i32 16) [[NUW:#[0-9]+]] ; CHECK-NEXT: call void @llvm.arm.neon.vst1.v8i16(i8* %q, <8 x i16> %y, i32 16) ; CHECK-NEXT: %c = add <8 x i16> %a, %a define <8 x i16> @test0(i8* %p, i8* %q, <8 x i16> %y) { @@ -23,7 +23,7 @@ declare <8 x i16> @llvm.arm.neon.vld1.v8i16(i8*, i32) nounwind readonly declare void @llvm.arm.neon.vst1.v8i16(i8*, <8 x i16>, i32) nounwind ; CHECK: attributes #0 = { nounwind readonly } -; CHECK: attributes #1 = { nounwind } +; CHECK: attributes [[NUW]] = { nounwind } !0 = metadata !{metadata !"tbaa root", null} !1 = metadata !{metadata !"A", metadata !0} |