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| author | Eli Friedman <eli.friedman@gmail.com> | 2011-08-12 22:50:01 +0000 |
|---|---|---|
| committer | Eli Friedman <eli.friedman@gmail.com> | 2011-08-12 22:50:01 +0000 |
| commit | f03bb260c90ad013aa4e55af36382875011c95b8 (patch) | |
| tree | 6d554ebcc06bd6d3509a7808029994c894d002d3 /test/Assembler/atomic.ll | |
| parent | 10342123adec62151bf9060493dd13583c67ae52 (diff) | |
| download | external_llvm-f03bb260c90ad013aa4e55af36382875011c95b8.zip external_llvm-f03bb260c90ad013aa4e55af36382875011c95b8.tar.gz external_llvm-f03bb260c90ad013aa4e55af36382875011c95b8.tar.bz2 | |
Move "atomic" and "volatile" designations on instructions after the opcode
of the instruction.
Note that this change affects the existing non-atomic load and store
instructions; the parser now accepts both forms, and the change is noted
in the release notes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137527 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/Assembler/atomic.ll')
| -rw-r--r-- | test/Assembler/atomic.ll | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/test/Assembler/atomic.ll b/test/Assembler/atomic.ll new file mode 100644 index 0000000..fa6f1f4 --- /dev/null +++ b/test/Assembler/atomic.ll @@ -0,0 +1,26 @@ +; RUN: opt -S < %s | FileCheck %s +; Basic smoke test for atomic operations. + +define void @f(i32* %x) { + ; CHECK: load atomic i32* %x unordered, align 4 + load atomic i32* %x unordered, align 4 + ; CHECK: load atomic volatile i32* %x singlethread acquire, align 4 + load atomic volatile i32* %x singlethread acquire, align 4 + ; CHECK: store atomic i32 3, i32* %x release, align 4 + store atomic i32 3, i32* %x release, align 4 + ; CHECK: store atomic volatile i32 3, i32* %x singlethread monotonic, align 4 + store atomic volatile i32 3, i32* %x singlethread monotonic, align 4 + ; CHECK: cmpxchg i32* %x, i32 1, i32 0 singlethread monotonic + cmpxchg i32* %x, i32 1, i32 0 singlethread monotonic + ; CHECK: cmpxchg volatile i32* %x, i32 0, i32 1 acq_rel + cmpxchg volatile i32* %x, i32 0, i32 1 acq_rel + ; CHECK: atomicrmw add i32* %x, i32 10 seq_cst + atomicrmw add i32* %x, i32 10 seq_cst + ; CHECK: atomicrmw volatile xchg i32* %x, i32 10 monotonic + atomicrmw volatile xchg i32* %x, i32 10 monotonic + ; CHECK: fence singlethread release + fence singlethread release + ; CHECK: fence seq_cst + fence seq_cst + ret void +} |