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| author | Dan Gohman <gohman@apple.com> | 2009-03-14 17:09:17 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2009-03-14 17:09:17 +0000 |
| commit | c1317939045d1907f1e4a20315feceb0afa384a2 (patch) | |
| tree | 133eb060fd6127555612613aceb20462a4aed2d5 /test/Assembler/vector-shift.ll | |
| parent | 8d8ba38f98c465a0d95501361561baecbc104d59 (diff) | |
| download | external_llvm-c1317939045d1907f1e4a20315feceb0afa384a2.zip external_llvm-c1317939045d1907f1e4a20315feceb0afa384a2.tar.gz external_llvm-c1317939045d1907f1e4a20315feceb0afa384a2.tar.bz2 | |
Apply a patch by Micah Villmow to fix AsmParser to accept vector
shift constant expressions, and add support for folding vector
shift constant expressions. This fixes PR3802.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67010 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/Assembler/vector-shift.ll')
| -rw-r--r-- | test/Assembler/vector-shift.ll | 17 |
1 files changed, 14 insertions, 3 deletions
diff --git a/test/Assembler/vector-shift.ll b/test/Assembler/vector-shift.ll index 3b2c07c..1850e66 100644 --- a/test/Assembler/vector-shift.ll +++ b/test/Assembler/vector-shift.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep shl -; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep ashr -; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep lshr +; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep shl | count 1 +; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep ashr | count 1 +; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep lshr | count 1 define <4 x i32> @foo(<4 x i32> %a, <4 x i32> %b) nounwind { entry: @@ -19,3 +19,14 @@ entry: %cmp = ashr <4 x i32> %a, %b ; <4 x i32> [#uses=1] ret <4 x i32> %cmp } + +; Constant expressions: these should be folded. +define <2 x i64> @foo_ce() nounwind { + ret <2 x i64> shl (<2 x i64> <i64 5, i64 6>, <2 x i64> <i64 3, i64 5>) +} +define <2 x i64> @bar_ce() nounwind { + ret <2 x i64> lshr (<2 x i64> <i64 340, i64 380>, <2 x i64> <i64 3, i64 5>) +} +define <2 x i64> @baz_ce() nounwind { + ret <2 x i64> ashr (<2 x i64> <i64 573, i64 411>, <2 x i64> <i64 3, i64 5>) +} |