Update aosp/master LLVM for rebase to r222494.

Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
author: Stephen Hines <srhines@google.com> 2014-12-01 14:51:49 -0800
committer: Stephen Hines <srhines@google.com> 2014-12-02 16:08:10 -0800
commit: 37ed9c199ca639565f6ce88105f9e39e898d82d0 (patch)
tree: 8fb36d3910e3ee4c4e1b7422f4f017108efc52f5 /test/Bitcode
parent: d2327b22152ced7bc46dc629fc908959e8a52d03 (diff)
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53 files changed, 1675 insertions, 1102 deletions
diff --git a/test/Bitcode/2006-12-11-Cast-ConstExpr.ll b/test/Bitcode/2006-12-11-Cast-ConstExpr.ll
index e704627..35bf7ab 100644
--- a/test/Bitcode/2006-12-11-Cast-ConstExpr.ll
+++ b/test/Bitcode/2006-12-11-Cast-ConstExpr.ll
@@ -1,6 +1,7 @@
 ; This test ensures that we get a bitcast constant expression in and out,
 ; not a sitofp constant expression. 
 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+; RUN: verify-uselistorder < %s
 ; CHECK: bitcast (
 
 @G = external global i32
diff --git a/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll b/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll
index 415f88e..9405fbb 100644
--- a/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll
+++ b/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-as < %s | llvm-dis -disable-output
+; RUN: verify-uselistorder < %s
 ; PR4373
 
 @foo = weak global { i32 } zeroinitializer              
diff --git a/test/Bitcode/aggregateInstructions.3.2.ll b/test/Bitcode/aggregateInstructions.3.2.ll
index 9352390..59aafd1 100644
--- a/test/Bitcode/aggregateInstructions.3.2.ll
+++ b/test/Bitcode/aggregateInstructions.3.2.ll
@@ -1,33 +1,34 @@
-; RUN:  llvm-dis < %s.bc| FileCheck %s
-
-; aggregateOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
-; The test checks that LLVM does not misread instructions with aggregate operands
-; in older bitcode files.
-
-define void @extractvalue([4 x i8] %x1, [4 x [4 x i8]] %x2, {{i32, float}} %x3){
-entry:
-; CHECK: %res1 = extractvalue [4 x i8] %x1, 0
-  %res1 = extractvalue [4 x i8] %x1, 0
-  
-; CHECK-NEXT: %res2 = extractvalue [4 x [4 x i8]] %x2, 1
-  %res2 = extractvalue [4 x [4 x i8 ]] %x2, 1
-
-; CHECK-NEXT: %res3 = extractvalue [4 x [4 x i8]] %x2, 0, 1
-  %res3 = extractvalue [4 x [4 x i8 ]] %x2, 0, 1
-  
-; CHECK-NEXT: %res4 = extractvalue { { i32, float } } %x3, 0, 1
-  %res4 = extractvalue {{i32, float}} %x3, 0, 1
-
-  ret void
-}
-
-define void @insertvalue([4 x [4 x i8 ]] %x1){
-entry:
-; CHECK: %res1 = insertvalue [4 x [4 x i8]] %x1, i8 0, 0, 0
-  %res1 = insertvalue [4 x [4 x i8 ]] %x1, i8 0, 0, 0
-  
-; CHECK-NEXT: %res2 = insertvalue [4 x [4 x i8]] undef, i8 0, 0, 0
-  %res2 = insertvalue [4 x [4 x i8 ]] undef, i8 0, 0, 0
-
-  ret void
-}
-\ No newline at end of file
+; RUN: llvm-dis < %s.bc| FileCheck %s
+; RUN: verify-uselistorder < %s.bc
+
+; aggregateOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
+; The test checks that LLVM does not misread instructions with aggregate operands
+; in older bitcode files.
+
+define void @extractvalue([4 x i8] %x1, [4 x [4 x i8]] %x2, {{i32, float}} %x3){
+entry:
+; CHECK: %res1 = extractvalue [4 x i8] %x1, 0
+  %res1 = extractvalue [4 x i8] %x1, 0
+
+; CHECK-NEXT: %res2 = extractvalue [4 x [4 x i8]] %x2, 1
+  %res2 = extractvalue [4 x [4 x i8 ]] %x2, 1
+
+; CHECK-NEXT: %res3 = extractvalue [4 x [4 x i8]] %x2, 0, 1
+  %res3 = extractvalue [4 x [4 x i8 ]] %x2, 0, 1
+
+; CHECK-NEXT: %res4 = extractvalue { { i32, float } } %x3, 0, 1
+  %res4 = extractvalue {{i32, float}} %x3, 0, 1
+
+  ret void
+}
+
+define void @insertvalue([4 x [4 x i8 ]] %x1){
+entry:
+; CHECK: %res1 = insertvalue [4 x [4 x i8]] %x1, i8 0, 0, 0
+  %res1 = insertvalue [4 x [4 x i8 ]] %x1, i8 0, 0, 0
+
+; CHECK-NEXT: %res2 = insertvalue [4 x [4 x i8]] undef, i8 0, 0, 0
+  %res2 = insertvalue [4 x [4 x i8 ]] undef, i8 0, 0, 0
+
+  ret void
+}
diff --git a/test/Bitcode/arm32_neon_vcnt_upgrade.ll b/test/Bitcode/arm32_neon_vcnt_upgrade.ll
index 10b9284..ed3981b 100644
--- a/test/Bitcode/arm32_neon_vcnt_upgrade.ll
+++ b/test/Bitcode/arm32_neon_vcnt_upgrade.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+; RUN: verify-uselistorder < %s
 ; Tests vclz and vcnt
 
 define <4 x i16> @vclz16(<4 x i16>* %A) nounwind {
diff --git a/test/Bitcode/atomic.ll b/test/Bitcode/atomic.ll
index 37815a7..c09e74c 100644
--- a/test/Bitcode/atomic.ll
+++ b/test/Bitcode/atomic.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-as %s -o - | llvm-dis | FileCheck %s
+; RUN: verify-uselistorder < %s
 
 define void @test_cmpxchg(i32* %addr, i32 %desired, i32 %new) {
   cmpxchg i32* %addr, i32 %desired, i32 %new seq_cst seq_cst
@@ -14,4 +15,4 @@ define void @test_cmpxchg(i32* %addr, i32 %desired, i32 %new) {
   ; CHECK: cmpxchg weak volatile i32* %addr, i32 %desired, i32 %new singlethread release monotonic
 
   ret void
-}
-\ No newline at end of file
+}
diff --git a/test/Bitcode/attributes-3.3.ll b/test/Bitcode/attributes-3.3.ll
index cd70ba1..b564425 100644
--- a/test/Bitcode/attributes-3.3.ll
+++ b/test/Bitcode/attributes-3.3.ll
@@ -1,4 +1,5 @@
 ; RUN:  llvm-dis < %s.bc| FileCheck %s
+; RUN:  verify-uselistorder < %s.bc
 
 ; attributes-3.3.ll.bc was generated by passing this file to llvm-as-3.3.
 ; The test checks that LLVM does not silently misread attributes of
diff --git a/test/Bitcode/attributes.ll b/test/Bitcode/attributes.ll
index 49366de..c75ee80 100644
--- a/test/Bitcode/attributes.ll
+++ b/test/Bitcode/attributes.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+; RUN: verify-uselistorder < %s
 ; PR12696
 
 define void @f1(i8 zeroext)
@@ -229,6 +230,21 @@ define void @f38() unnamed_addr jumptable {
     unreachable
 }
 
+define dereferenceable(2) i8* @f39(i8* dereferenceable(1) %a) {
+; CHECK: define dereferenceable(2) i8* @f39(i8* dereferenceable(1) %a) {
+        ret i8* %a
+}
+
+define dereferenceable(18446744073709551606) i8* @f40(i8* dereferenceable(18446744073709551615) %a) {
+; CHECK: define dereferenceable(18446744073709551606) i8* @f40(i8* dereferenceable(18446744073709551615) %a) {
+        ret i8* %a
+}
+
+define void @f41(i8* align 32, double* align 64) {
+; CHECK: define void @f41(i8* align 32, double* align 64) {
+        ret void
+}
+
 ; CHECK: attributes #0 = { noreturn }
 ; CHECK: attributes #1 = { nounwind }
 ; CHECK: attributes #2 = { readnone }
diff --git a/test/Bitcode/binaryFloatInstructions.3.2.ll b/test/Bitcode/binaryFloatInstructions.3.2.ll
index f94d82d..cec1683 100644
--- a/test/Bitcode/binaryFloatInstructions.3.2.ll
+++ b/test/Bitcode/binaryFloatInstructions.3.2.ll
@@ -1,120 +1,121 @@
-; RUN:  llvm-dis < %s.bc| FileCheck %s
-
-; BinaryFloatOperation.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
-; The test checks that LLVM does not misread binary float instructions from
-; older bitcode files.
-
-define void @fadd(float %x1, double %x2 ,half %x3, fp128 %x4, x86_fp80 %x5, ppc_fp128 %x6){
-entry:
-; CHECK: %res1 = fadd float %x1, %x1
-  %res1 = fadd float %x1, %x1
-
-; CHECK-NEXT: %res2 = fadd double %x2, %x2
-  %res2 = fadd double %x2, %x2
-
-; CHECK-NEXT: %res3 = fadd half %x3, %x3
-  %res3 = fadd half %x3, %x3
-
-; CHECK-NEXT: %res4 = fadd fp128 %x4, %x4
-  %res4 = fadd fp128 %x4, %x4
-
-; CHECK-NEXT: %res5 = fadd x86_fp80 %x5, %x5
-  %res5 = fadd x86_fp80 %x5, %x5
-  
-; CHECK-NEXT: %res6 = fadd ppc_fp128 %x6, %x6
-  %res6 = fadd ppc_fp128 %x6, %x6
-  
-  ret void
-}
-
-define void @faddFloatVec(<2 x float> %x1, <3 x float> %x2 ,<4 x float> %x3, <8 x float> %x4, <16 x float> %x5){
-entry:
-; CHECK: %res1 = fadd <2 x float> %x1, %x1
-  %res1 = fadd <2 x float> %x1, %x1
-
-; CHECK-NEXT: %res2 = fadd <3 x float> %x2, %x2
-  %res2 = fadd <3 x float> %x2, %x2
-
-; CHECK-NEXT: %res3 = fadd <4 x float> %x3, %x3
-  %res3 = fadd <4 x float> %x3, %x3
-
-; CHECK-NEXT: %res4 = fadd <8 x float> %x4, %x4
-  %res4 = fadd <8 x float> %x4, %x4
-
-; CHECK-NEXT: %res5 = fadd <16 x float> %x5, %x5
-  %res5 = fadd <16 x float> %x5, %x5
-  
-  ret void
-}
-
-define void @faddDoubleVec(<2 x double> %x1, <3 x double> %x2 ,<4 x double> %x3, <8 x double> %x4, <16 x double> %x5){
-entry:
-; CHECK: %res1 = fadd <2 x double> %x1, %x1
-  %res1 = fadd <2 x double> %x1, %x1
-
-; CHECK-NEXT: %res2 = fadd <3 x double> %x2, %x2
-  %res2 = fadd <3 x double> %x2, %x2
-
-; CHECK-NEXT: %res3 = fadd <4 x double> %x3, %x3
-  %res3 = fadd <4 x double> %x3, %x3
-
-; CHECK-NEXT: %res4 = fadd <8 x double> %x4, %x4
-  %res4 = fadd <8 x double> %x4, %x4
-
-; CHECK-NEXT: %res5 = fadd <16 x double> %x5, %x5
-  %res5 = fadd <16 x double> %x5, %x5
-  
-  ret void
-}
-
-define void @faddHalfVec(<2 x half> %x1, <3 x half> %x2 ,<4 x half> %x3, <8 x half> %x4, <16 x half> %x5){
-entry:
-; CHECK: %res1 = fadd <2 x half> %x1, %x1
-  %res1 = fadd <2 x half> %x1, %x1
-
-; CHECK-NEXT: %res2 = fadd <3 x half> %x2, %x2
-  %res2 = fadd <3 x half> %x2, %x2
-
-; CHECK-NEXT: %res3 = fadd <4 x half> %x3, %x3
-  %res3 = fadd <4 x half> %x3, %x3
-
-; CHECK-NEXT: %res4 = fadd <8 x half> %x4, %x4
-  %res4 = fadd <8 x half> %x4, %x4
-
-; CHECK-NEXT: %res5 = fadd <16 x half> %x5, %x5
-  %res5 = fadd <16 x half> %x5, %x5
-  
-  ret void
-}
-
-define void @fsub(float %x1){
-entry:
-; CHECK: %res1 = fsub float %x1, %x1
-  %res1 = fsub float %x1, %x1
-
-  ret void
-}
-
-define void @fmul(float %x1){
-entry:
-; CHECK: %res1 = fmul float %x1, %x1
-  %res1 = fmul float %x1, %x1
-  
-  ret void
-}
-
-define void @fdiv(float %x1){
-entry:
-; CHECK: %res1 = fdiv float %x1, %x1
-  %res1 = fdiv float %x1, %x1
-  
-  ret void
-}
-
-define void @frem(float %x1){
-entry:
-; CHECK: %res1 = frem float %x1, %x1
-  %res1 = frem float %x1, %x1
-
-  ret void
-}
+; RUN: llvm-dis < %s.bc| FileCheck %s
+; RUN: verify-uselistorder < %s.bc
+
+; BinaryFloatOperation.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
+; The test checks that LLVM does not misread binary float instructions from
+; older bitcode files.
+
+define void @fadd(float %x1, double %x2 ,half %x3, fp128 %x4, x86_fp80 %x5, ppc_fp128 %x6){
+entry:
+; CHECK: %res1 = fadd float %x1, %x1
+  %res1 = fadd float %x1, %x1
+
+; CHECK-NEXT: %res2 = fadd double %x2, %x2
+  %res2 = fadd double %x2, %x2
+
+; CHECK-NEXT: %res3 = fadd half %x3, %x3
+  %res3 = fadd half %x3, %x3
+
+; CHECK-NEXT: %res4 = fadd fp128 %x4, %x4
+  %res4 = fadd fp128 %x4, %x4
+
+; CHECK-NEXT: %res5 = fadd x86_fp80 %x5, %x5
+  %res5 = fadd x86_fp80 %x5, %x5
+
+; CHECK-NEXT: %res6 = fadd ppc_fp128 %x6, %x6
+  %res6 = fadd ppc_fp128 %x6, %x6
+
+  ret void
+}
+
+define void @faddFloatVec(<2 x float> %x1, <3 x float> %x2 ,<4 x float> %x3, <8 x float> %x4, <16 x float> %x5){
+entry:
+; CHECK: %res1 = fadd <2 x float> %x1, %x1
+  %res1 = fadd <2 x float> %x1, %x1
+
+; CHECK-NEXT: %res2 = fadd <3 x float> %x2, %x2
+  %res2 = fadd <3 x float> %x2, %x2
+
+; CHECK-NEXT: %res3 = fadd <4 x float> %x3, %x3
+  %res3 = fadd <4 x float> %x3, %x3
+
+; CHECK-NEXT: %res4 = fadd <8 x float> %x4, %x4
+  %res4 = fadd <8 x float> %x4, %x4
+
+; CHECK-NEXT: %res5 = fadd <16 x float> %x5, %x5
+  %res5 = fadd <16 x float> %x5, %x5
+
+  ret void
+}
+
+define void @faddDoubleVec(<2 x double> %x1, <3 x double> %x2 ,<4 x double> %x3, <8 x double> %x4, <16 x double> %x5){
+entry:
+; CHECK: %res1 = fadd <2 x double> %x1, %x1
+  %res1 = fadd <2 x double> %x1, %x1
+
+; CHECK-NEXT: %res2 = fadd <3 x double> %x2, %x2
+  %res2 = fadd <3 x double> %x2, %x2
+
+; CHECK-NEXT: %res3 = fadd <4 x double> %x3, %x3
+  %res3 = fadd <4 x double> %x3, %x3
+
+; CHECK-NEXT: %res4 = fadd <8 x double> %x4, %x4
+  %res4 = fadd <8 x double> %x4, %x4
+
+; CHECK-NEXT: %res5 = fadd <16 x double> %x5, %x5
+  %res5 = fadd <16 x double> %x5, %x5
+
+  ret void
+}
+
+define void @faddHalfVec(<2 x half> %x1, <3 x half> %x2 ,<4 x half> %x3, <8 x half> %x4, <16 x half> %x5){
+entry:
+; CHECK: %res1 = fadd <2 x half> %x1, %x1
+  %res1 = fadd <2 x half> %x1, %x1
+
+; CHECK-NEXT: %res2 = fadd <3 x half> %x2, %x2
+  %res2 = fadd <3 x half> %x2, %x2
+
+; CHECK-NEXT: %res3 = fadd <4 x half> %x3, %x3
+  %res3 = fadd <4 x half> %x3, %x3
+
+; CHECK-NEXT: %res4 = fadd <8 x half> %x4, %x4
+  %res4 = fadd <8 x half> %x4, %x4
+
+; CHECK-NEXT: %res5 = fadd <16 x half> %x5, %x5
+  %res5 = fadd <16 x half> %x5, %x5
+
+  ret void
+}
+
+define void @fsub(float %x1){
+entry:
+; CHECK: %res1 = fsub float %x1, %x1
+  %res1 = fsub float %x1, %x1
+
+  ret void
+}
+
+define void @fmul(float %x1){
+entry:
+; CHECK: %res1 = fmul float %x1, %x1
+  %res1 = fmul float %x1, %x1
+
+  ret void
+}
+
+define void @fdiv(float %x1){
+entry:
+; CHECK: %res1 = fdiv float %x1, %x1
+  %res1 = fdiv float %x1, %x1
+
+  ret void
+}
+
+define void @frem(float %x1){
+entry:
+; CHECK: %res1 = frem float %x1, %x1
+  %res1 = frem float %x1, %x1
+
+  ret void
+}
diff --git a/test/Bitcode/binaryIntInstructions.3.2.ll b/test/Bitcode/binaryIntInstructions.3.2.ll
index b08501c..e484ff1 100644
--- a/test/Bitcode/binaryIntInstructions.3.2.ll
+++ b/test/Bitcode/binaryIntInstructions.3.2.ll
@@ -1,177 +1,178 @@
-; RUN:  llvm-dis < %s.bc| FileCheck %s
-
-; BinaryIntOperation.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
-; The test checks that LLVM does not misread binary integer instructions from
-; older bitcode files.
-
-define void @add(i1 %x1, i8 %x2 ,i16 %x3, i32 %x4, i64 %x5){
-entry:
-; CHECK: %res1 = add i1 %x1, %x1
-  %res1 = add i1 %x1, %x1
-
-; CHECK-NEXT: %res2 = add i8 %x2, %x2
-  %res2 = add i8 %x2, %x2
-
-; CHECK-NEXT: %res3 = add i16 %x3, %x3
-  %res3 = add i16 %x3, %x3
-
-; CHECK-NEXT: %res4 = add i32 %x4, %x4
-  %res4 = add i32 %x4, %x4
-
-; CHECK-NEXT: %res5 = add i64 %x5, %x5
-  %res5 = add i64 %x5, %x5
-  
-; CHECK: %res6 = add nuw i1 %x1, %x1
-  %res6 = add nuw i1 %x1, %x1
-  
-; CHECK: %res7 = add nsw i1 %x1, %x1
-  %res7 = add nsw i1 %x1, %x1
-  
-; CHECK: %res8 = add nuw nsw i1 %x1, %x1
-  %res8 = add nuw nsw i1 %x1, %x1
-  
-  ret void
-}
-
-define void @addvec8NuwNsw(<2 x i8> %x1, <3 x i8> %x2 ,<4 x i8> %x3, <8 x i8> %x4, <16 x i8> %x5){
-entry:
-; CHECK: %res1 = add nuw nsw <2 x i8> %x1, %x1
-  %res1 = add nuw nsw <2 x i8> %x1, %x1
-
-; CHECK-NEXT: %res2 = add nuw nsw <3 x i8> %x2, %x2
-  %res2 = add nuw nsw <3 x i8> %x2, %x2
-
-; CHECK-NEXT: %res3 = add nuw nsw <4 x i8> %x3, %x3
-  %res3 = add nuw nsw <4 x i8> %x3, %x3
-
-; CHECK-NEXT: %res4 = add nuw nsw <8 x i8> %x4, %x4
-  %res4 = add nuw nsw <8 x i8> %x4, %x4
-  
-; CHECK-NEXT: %res5 = add nuw nsw <16 x i8> %x5, %x5
-  %res5 = add nuw nsw <16 x i8> %x5, %x5
-  
-  ret void
-}
-
-define void @addvec16NuwNsw(<2 x i16> %x1, <3 x i16> %x2 ,<4 x i16> %x3, <8 x i16> %x4, <16 x i16> %x5){
-entry:
-; CHECK: %res1 = add nuw nsw <2 x i16> %x1, %x1
-  %res1 = add nuw nsw <2 x i16> %x1, %x1
-
-; CHECK-NEXT: %res2 = add nuw nsw <3 x i16> %x2, %x2
-  %res2 = add nuw nsw <3 x i16> %x2, %x2
-
-; CHECK-NEXT: %res3 = add nuw nsw <4 x i16> %x3, %x3
-  %res3 = add nuw nsw <4 x i16> %x3, %x3
-
-; CHECK-NEXT: %res4 = add nuw nsw <8 x i16> %x4, %x4
-  %res4 = add nuw nsw <8 x i16> %x4, %x4
-  
-; CHECK-NEXT: %res5 = add nuw nsw <16 x i16> %x5, %x5
-  %res5 = add nuw nsw <16 x i16> %x5, %x5
-  
-  ret void
-}
-
-define void @addvec32NuwNsw(<2 x i32> %x1, <3 x i32> %x2 ,<4 x i32> %x3, <8 x i32> %x4, <16 x i32> %x5){
-entry:
-; CHECK: %res1 = add nuw nsw <2 x i32> %x1, %x1
-  %res1 = add nuw nsw <2 x i32> %x1, %x1
-
-; CHECK-NEXT: %res2 = add nuw nsw <3 x i32> %x2, %x2
-  %res2 = add nuw nsw <3 x i32> %x2, %x2
-
-; CHECK-NEXT: %res3 = add nuw nsw <4 x i32> %x3, %x3
-  %res3 = add nuw nsw <4 x i32> %x3, %x3
-
-; CHECK-NEXT: %res4 = add nuw nsw <8 x i32> %x4, %x4
-  %res4 = add nuw nsw <8 x i32> %x4, %x4
-  
-; CHECK-NEXT: %res5 = add nuw nsw <16 x i32> %x5, %x5
-  %res5 = add nuw nsw <16 x i32> %x5, %x5
-  
-  ret void
-}
-
-define void @addvec64NuwNsw(<2 x i64> %x1, <3 x i64> %x2 ,<4 x i64> %x3, <8 x i64> %x4, <16 x i64> %x5){
-entry:
-; CHECK: %res1 = add nuw nsw <2 x i64> %x1, %x1
-  %res1 = add nuw nsw <2 x i64> %x1, %x1
-
-; CHECK-NEXT: %res2 = add nuw nsw <3 x i64> %x2, %x2
-  %res2 = add nuw nsw <3 x i64> %x2, %x2
-
-; CHECK-NEXT: %res3 = add nuw nsw <4 x i64> %x3, %x3
-  %res3 = add nuw nsw <4 x i64> %x3, %x3
-
-; CHECK-NEXT: %res4 = add nuw nsw <8 x i64> %x4, %x4
-  %res4 = add nuw nsw <8 x i64> %x4, %x4
-  
-; CHECK-NEXT: %res5 = add nuw nsw <16 x i64> %x5, %x5
-  %res5 = add nuw nsw <16 x i64> %x5, %x5
-  
-  ret void
-}
-
-define void @sub(i8 %x1){
-entry:
-; CHECK: %res1 = sub i8 %x1, %x1
-  %res1 = sub i8 %x1, %x1
-  
-; CHECK: %res2 = sub nuw i8 %x1, %x1
-  %res2 = sub nuw i8 %x1, %x1
-  
-; CHECK: %res3 = sub nsw i8 %x1, %x1
-  %res3 = sub nsw i8 %x1, %x1
-  
-; CHECK: %res4 = sub nuw nsw i8 %x1, %x1
-  %res4 = sub nuw nsw i8 %x1, %x1
-  
-  ret void
-}
-
-define void @mul(i8 %x1){
-entry:
-; CHECK: %res1 = mul i8 %x1, %x1
-  %res1 = mul i8 %x1, %x1
-  
-  ret void
-}
-
-define void @udiv(i8 %x1){
-entry:
-; CHECK: %res1 = udiv i8 %x1, %x1
-  %res1 = udiv i8 %x1, %x1
-  
-; CHECK-NEXT: %res2 = udiv exact i8 %x1, %x1
-  %res2 = udiv exact i8 %x1, %x1
-
-  ret void
-}
-
-define void @sdiv(i8 %x1){
-entry:
-; CHECK: %res1 = sdiv i8 %x1, %x1
-  %res1 = sdiv i8 %x1, %x1
-  
-; CHECK-NEXT: %res2 = sdiv exact i8 %x1, %x1
-  %res2 = sdiv exact i8 %x1, %x1
-
-  ret void
-}
-
-define void @urem(i32 %x1){
-entry:
-; CHECK: %res1 = urem i32 %x1, %x1
-  %res1 = urem i32 %x1, %x1
-  
-  ret void
-}
-
-define void @srem(i32 %x1){
-entry:
-; CHECK: %res1 = srem i32 %x1, %x1
-  %res1 = srem i32 %x1, %x1
-  
-  ret void
-}
+; RUN: llvm-dis < %s.bc| FileCheck %s
+; RUN: verify-uselistorder < %s.bc
+
+; BinaryIntOperation.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
+; The test checks that LLVM does not misread binary integer instructions from
+; older bitcode files.
+
+define void @add(i1 %x1, i8 %x2 ,i16 %x3, i32 %x4, i64 %x5){
+entry:
+; CHECK: %res1 = add i1 %x1, %x1
+  %res1 = add i1 %x1, %x1
+
+; CHECK-NEXT: %res2 = add i8 %x2, %x2
+  %res2 = add i8 %x2, %x2
+
+; CHECK-NEXT: %res3 = add i16 %x3, %x3
+  %res3 = add i16 %x3, %x3
+
+; CHECK-NEXT: %res4 = add i32 %x4, %x4
+  %res4 = add i32 %x4, %x4
+
+; CHECK-NEXT: %res5 = add i64 %x5, %x5
+  %res5 = add i64 %x5, %x5
+
+; CHECK: %res6 = add nuw i1 %x1, %x1
+  %res6 = add nuw i1 %x1, %x1
+
+; CHECK: %res7 = add nsw i1 %x1, %x1
+  %res7 = add nsw i1 %x1, %x1
+
+; CHECK: %res8 = add nuw nsw i1 %x1, %x1
+  %res8 = add nuw nsw i1 %x1, %x1
+
+  ret void
+}
+
+define void @addvec8NuwNsw(<2 x i8> %x1, <3 x i8> %x2 ,<4 x i8> %x3, <8 x i8> %x4, <16 x i8> %x5){
+entry:
+; CHECK: %res1 = add nuw nsw <2 x i8> %x1, %x1
+  %res1 = add nuw nsw <2 x i8> %x1, %x1
+
+; CHECK-NEXT: %res2 = add nuw nsw <3 x i8> %x2, %x2
+  %res2 = add nuw nsw <3 x i8> %x2, %x2
+
+; CHECK-NEXT: %res3 = add nuw nsw <4 x i8> %x3, %x3
+  %res3 = add nuw nsw <4 x i8> %x3, %x3
+
+; CHECK-NEXT: %res4 = add nuw nsw <8 x i8> %x4, %x4
+  %res4 = add nuw nsw <8 x i8> %x4, %x4
+
+; CHECK-NEXT: %res5 = add nuw nsw <16 x i8> %x5, %x5
+  %res5 = add nuw nsw <16 x i8> %x5, %x5
+
+  ret void
+}
+
+define void @addvec16NuwNsw(<2 x i16> %x1, <3 x i16> %x2 ,<4 x i16> %x3, <8 x i16> %x4, <16 x i16> %x5){
+entry:
+; CHECK: %res1 = add nuw nsw <2 x i16> %x1, %x1
+  %res1 = add nuw nsw <2 x i16> %x1, %x1
+
+; CHECK-NEXT: %res2 = add nuw nsw <3 x i16> %x2, %x2
+  %res2 = add nuw nsw <3 x i16> %x2, %x2
+
+; CHECK-NEXT: %res3 = add nuw nsw <4 x i16> %x3, %x3
+  %res3 = add nuw nsw <4 x i16> %x3, %x3
+
+; CHECK-NEXT: %res4 = add nuw nsw <8 x i16> %x4, %x4
+  %res4 = add nuw nsw <8 x i16> %x4, %x4
+
+; CHECK-NEXT: %res5 = add nuw nsw <16 x i16> %x5, %x5
+  %res5 = add nuw nsw <16 x i16> %x5, %x5
+
+  ret void
+}
+
+define void @addvec32NuwNsw(<2 x i32> %x1, <3 x i32> %x2 ,<4 x i32> %x3, <8 x i32> %x4, <16 x i32> %x5){
+entry:
+; CHECK: %res1 = add nuw nsw <2 x i32> %x1, %x1
+  %res1 = add nuw nsw <2 x i32> %x1, %x1
+
+; CHECK-NEXT: %res2 = add nuw nsw <3 x i32> %x2, %x2
+  %res2 = add nuw nsw <3 x i32> %x2, %x2
+
+; CHECK-NEXT: %res3 = add nuw nsw <4 x i32> %x3, %x3
+  %res3 = add nuw nsw <4 x i32> %x3, %x3
+
+; CHECK-NEXT: %res4 = add nuw nsw <8 x i32> %x4, %x4
+  %res4 = add nuw nsw <8 x i32> %x4, %x4
+
+; CHECK-NEXT: %res5 = add nuw nsw <16 x i32> %x5, %x5
+  %res5 = add nuw nsw <16 x i32> %x5, %x5
+
+  ret void
+}
+
+define void @addvec64NuwNsw(<2 x i64> %x1, <3 x i64> %x2 ,<4 x i64> %x3, <8 x i64> %x4, <16 x i64> %x5){
+entry:
+; CHECK: %res1 = add nuw nsw <2 x i64> %x1, %x1
+  %res1 = add nuw nsw <2 x i64> %x1, %x1
+
+; CHECK-NEXT: %res2 = add nuw nsw <3 x i64> %x2, %x2
+  %res2 = add nuw nsw <3 x i64> %x2, %x2
+
+; CHECK-NEXT: %res3 = add nuw nsw <4 x i64> %x3, %x3
+  %res3 = add nuw nsw <4 x i64> %x3, %x3
+
+; CHECK-NEXT: %res4 = add nuw nsw <8 x i64> %x4, %x4
+  %res4 = add nuw nsw <8 x i64> %x4, %x4
+
+; CHECK-NEXT: %res5 = add nuw nsw <16 x i64> %x5, %x5
+  %res5 = add nuw nsw <16 x i64> %x5, %x5
+
+  ret void
+}
+
+define void @sub(i8 %x1){
+entry:
+; CHECK: %res1 = sub i8 %x1, %x1
+  %res1 = sub i8 %x1, %x1
+
+; CHECK: %res2 = sub nuw i8 %x1, %x1
+  %res2 = sub nuw i8 %x1, %x1
+
+; CHECK: %res3 = sub nsw i8 %x1, %x1
+  %res3 = sub nsw i8 %x1, %x1
+
+; CHECK: %res4 = sub nuw nsw i8 %x1, %x1
+  %res4 = sub nuw nsw i8 %x1, %x1
+
+  ret void
+}
+
+define void @mul(i8 %x1){
+entry:
+; CHECK: %res1 = mul i8 %x1, %x1
+  %res1 = mul i8 %x1, %x1
+
+  ret void
+}
+
+define void @udiv(i8 %x1){
+entry:
+; CHECK: %res1 = udiv i8 %x1, %x1
+  %res1 = udiv i8 %x1, %x1
+
+; CHECK-NEXT: %res2 = udiv exact i8 %x1, %x1
+  %res2 = udiv exact i8 %x1, %x1
+
+  ret void
+}
+
+define void @sdiv(i8 %x1){
+entry:
+; CHECK: %res1 = sdiv i8 %x1, %x1
+  %res1 = sdiv i8 %x1, %x1
+
+; CHECK-NEXT: %res2 = sdiv exact i8 %x1, %x1
+  %res2 = sdiv exact i8 %x1, %x1
+
+  ret void
+}
+
+define void @urem(i32 %x1){
+entry:
+; CHECK: %res1 = urem i32 %x1, %x1
+  %res1 = urem i32 %x1, %x1
+
+  ret void
+}
+
+define void @srem(i32 %x1){
+entry:
+; CHECK: %res1 = srem i32 %x1, %x1
+  %res1 = srem i32 %x1, %x1
+
+  ret void
+}
diff --git a/test/Bitcode/bitwiseInstructions.3.2.ll b/test/Bitcode/bitwiseInstructions.3.2.ll
index 6225a08..aaaf4f5 100644
--- a/test/Bitcode/bitwiseInstructions.3.2.ll
+++ b/test/Bitcode/bitwiseInstructions.3.2.ll
@@ -1,68 +1,69 @@
-; RUN:  llvm-dis < %s.bc| FileCheck %s
-
-; bitwiseOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
-; The test checks that LLVM does not misread bitwise instructions from
-; older bitcode files.
-
-define void @shl(i8 %x1){
-entry:
-; CHECK: %res1 = shl i8 %x1, %x1
-  %res1 = shl i8 %x1, %x1
-  
-; CHECK: %res2 = shl nuw i8 %x1, %x1
-  %res2 = shl nuw i8 %x1, %x1
-  
-; CHECK: %res3 = shl nsw i8 %x1, %x1
-  %res3 = shl nsw i8 %x1, %x1
-
-; CHECK: %res4 = shl nuw nsw i8 %x1, %x1
-  %res4 = shl nuw nsw i8 %x1, %x1
-  
-  ret void
-}
-
-define void @lshr(i8 %x1){
-entry:
-; CHECK: %res1 = lshr i8 %x1, %x1
-  %res1 = lshr i8 %x1, %x1
-  
-; CHECK: %res2 = lshr exact i8 %x1, %x1
-  %res2 = lshr exact i8 %x1, %x1
-  
-  ret void
-}
-
-define void @ashr(i8 %x1){
-entry:
-; CHECK: %res1 = ashr i8 %x1, %x1
-  %res1 = ashr i8 %x1, %x1
-
-; CHECK-NEXT: %res2 = ashr exact i8 %x1, %x1
-  %res2 = ashr exact i8 %x1, %x1
-
-  ret void
-}
-
-define void @and(i8 %x1){
-entry:
-; CHECK: %res1 = and i8 %x1, %x1
-  %res1 = and i8 %x1, %x1
-  
-  ret void
-}
-
-define void @or(i8 %x1){
-entry:
-; CHECK: %res1 = or i8 %x1, %x1
-  %res1 = or i8 %x1, %x1
-  
-  ret void
-}
-
-define void @xor(i8 %x1){
-entry:
-; CHECK: %res1 = xor i8 %x1, %x1
-  %res1 = xor i8 %x1, %x1
-  
-  ret void
-}
-\ No newline at end of file
+; RUN: llvm-dis < %s.bc| FileCheck %s
+; RUN: verify-uselistorder < %s.bc
+
+; bitwiseOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
+; The test checks that LLVM does not misread bitwise instructions from
+; older bitcode files.
+
+define void @shl(i8 %x1){
+entry:
+; CHECK: %res1 = shl i8 %x1, %x1
+  %res1 = shl i8 %x1, %x1
+
+; CHECK: %res2 = shl nuw i8 %x1, %x1
+  %res2 = shl nuw i8 %x1, %x1
+
+; CHECK: %res3 = shl nsw i8 %x1, %x1
+  %res3 = shl nsw i8 %x1, %x1
+
+; CHECK: %res4 = shl nuw nsw i8 %x1, %x1
+  %res4 = shl nuw nsw i8 %x1, %x1
+
+  ret void
+}
+
+define void @lshr(i8 %x1){
+entry:
+; CHECK: %res1 = lshr i8 %x1, %x1
+  %res1 = lshr i8 %x1, %x1
+
+; CHECK: %res2 = lshr exact i8 %x1, %x1
+  %res2 = lshr exact i8 %x1, %x1
+
+  ret void
+}
+
+define void @ashr(i8 %x1){
+entry:
+; CHECK: %res1 = ashr i8 %x1, %x1
+  %res1 = ashr i8 %x1, %x1
+
+; CHECK-NEXT: %res2 = ashr exact i8 %x1, %x1
+  %res2 = ashr exact i8 %x1, %x1
+
+  ret void
+}
+
+define void @and(i8 %x1){
+entry:
+; CHECK: %res1 = and i8 %x1, %x1
+  %res1 = and i8 %x1, %x1
+
+  ret void
+}
+
+define void @or(i8 %x1){
+entry:
+; CHECK: %res1 = or i8 %x1, %x1
+  %res1 = or i8 %x1, %x1
+
+  ret void
+}
+
+define void @xor(i8 %x1){
+entry:
+; CHECK: %res1 = xor i8 %x1, %x1
+  %res1 = xor i8 %x1, %x1
+
+  ret void
+}
diff --git a/test/Bitcode/blockaddress.ll b/test/Bitcode/blockaddress.ll
index 8ac54be..db109df 100644
--- a/test/Bitcode/blockaddress.ll
+++ b/test/Bitcode/blockaddress.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+; RUN: verify-uselistorder < %s
 ; PR9857
 
 define void @f(i8** nocapture %ptr1) {
@@ -43,3 +44,17 @@ here:
 end:
   ret void
 }
+
+; Check a blockaddress taken in two separate functions before the referenced
+; function.
+define i8* @take1() {
+  ret i8* blockaddress(@taken, %bb)
+}
+define i8* @take2() {
+  ret i8* blockaddress(@taken, %bb)
+}
+define void @taken() {
+  unreachable
+bb:
+  unreachable
+}
diff --git a/test/Bitcode/calling-conventions.3.2.ll b/test/Bitcode/calling-conventions.3.2.ll
index aca9efd..f36e9f8 100644
--- a/test/Bitcode/calling-conventions.3.2.ll
+++ b/test/Bitcode/calling-conventions.3.2.ll
@@ -1,4 +1,5 @@
 ; RUN:  llvm-dis < %s.bc| FileCheck %s
+; RUN:  verify-uselistorder < %s.bc
 
 ; calling-conventions.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
 ; The test checks that LLVM does not silently misread calling conventions of
diff --git a/test/Bitcode/case-ranges-3.3.ll b/test/Bitcode/case-ranges-3.3.ll
index 6e1d0a6..020b37f 100644
--- a/test/Bitcode/case-ranges-3.3.ll
+++ b/test/Bitcode/case-ranges-3.3.ll
@@ -1,4 +1,5 @@
 ; RUN:  llvm-dis < %s.bc| FileCheck %s
+; RUN:  verify-uselistorder < %s.bc
 
 ; case-ranges.ll.bc was generated by passing this file to llvm-as from the 3.3
 ; release of LLVM. This tests that the bitcode for switches from that release
diff --git a/test/Bitcode/cmpxchg-upgrade.ll b/test/Bitcode/cmpxchg-upgrade.ll
index d36ac1c..125729e 100644
--- a/test/Bitcode/cmpxchg-upgrade.ll
+++ b/test/Bitcode/cmpxchg-upgrade.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-dis < %s.bc | FileCheck %s
+; RUN: verify-uselistorder < %s.bc
 
 ; cmpxchg-upgrade.ll.bc was produced by running a version of llvm-as from just
 ; before the IR change on this file.
@@ -20,4 +21,4 @@ define void @test(i32* %addr) {
 ; CHECK: cmpxchg i32* %addr, i32 42, i32 0 seq_cst seq_cst
 
    ret void
-}
-\ No newline at end of file
+}
diff --git a/test/Bitcode/constantsTest.3.2.ll b/test/Bitcode/constantsTest.3.2.ll
new file mode 100644
index 0000000..b4973cf
--- /dev/null
+++ b/test/Bitcode/constantsTest.3.2.ll
@@ -0,0 +1,124 @@
+; RUN:  llvm-dis < %s.bc| FileCheck %s
+
+; constantsTest.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
+; The test checks that LLVM does not misread binary float instructions of
+; older bitcode files.
+
+;global variable address
+; CHECK: @X = global i32 0
+@X = global i32 0
+; CHECK: @Y = global i32 1
+@Y = global i32 1
+; CHECK: @Z = global [2 x i32*] [i32* @X, i32* @Y]
+@Z = global [2 x i32*] [i32* @X, i32* @Y]
+
+
+define void @SimpleConstants(i32 %x) {
+entry:
+; null
+; CHECK: store i32 %x, i32* null
+  store i32 %x, i32* null
+ 
+; boolean
+; CHECK-NEXT: %res1 = fcmp true float 1.000000e+00, 1.000000e+00 
+  %res1 = fcmp true float 1.0, 1.0
+; CHECK-NEXT: %res2 = fcmp false float 1.000000e+00, 1.000000e+00
+  %res2 = fcmp false float 1.0, 1.0
+
+;integer
+; CHECK-NEXT: %res3 = add i32 0, 0
+  %res3 = add i32 0, 0
+
+;float
+; CHECK-NEXT: %res4 = fadd float 0.000000e+00, 0.000000e+00
+  %res4 = fadd float 0.0, 0.0
+
+  ret void
+}
+
+define void @ComplexConstants(<2 x i32> %x){
+entry:
+;constant structure
+; CHECK: %res1 = extractvalue { i32, float } { i32 1, float 2.000000e+00 }, 0
+  %res1 = extractvalue {i32, float} {i32 1, float 2.0}, 0
+  
+;const array
+; CHECK-NEXT: %res2 = extractvalue [2 x i32] [i32 1, i32 2], 0
+  %res2 = extractvalue [2 x i32] [i32 1, i32 2], 0
+  
+;const vector
+; CHECK-NEXT: %res3 = add <2 x i32> <i32 1, i32 1>, <i32 1, i32 1>
+  %res3 = add <2 x i32> <i32 1, i32 1>, <i32 1, i32 1>
+  
+;zeroinitializer
+; CHECK-NEXT: %res4 = add <2 x i32> %x, zeroinitializer
+  %res4 = add <2 x i32> %x, zeroinitializer
+  
+  ret void
+}
+
+define void @OtherConstants(i32 %x, i8* %Addr){
+entry:
+  ;undef
+  ; CHECK: %res1 = add i32 %x, undef 
+  %res1 = add i32 %x, undef
+  
+  ;poison
+  ; CHECK-NEXT: %poison = sub nuw i32 0, 1
+  %poison = sub nuw i32 0, 1
+  
+  ;address of basic block
+  ; CHECK-NEXT: %res2 = icmp eq i8* blockaddress(@OtherConstants, %Next), null
+  %res2 = icmp eq i8* blockaddress(@OtherConstants, %Next), null
+  br label %Next
+  Next: 
+  ret void
+}
+
+define void @OtherConstants2(){
+entry:
+  ; CHECK: trunc i32 1 to i8
+  trunc i32 1 to i8
+  ; CHECK-NEXT: zext i8 1 to i32
+  zext i8 1 to i32
+  ; CHECK-NEXT: sext i8 1 to i32
+  sext i8 1 to i32
+  ; CHECK-NEXT: fptrunc double 1.000000e+00 to float
+  fptrunc double 1.0 to float
+  ; CHECK-NEXT: fpext float 1.000000e+00 to double
+  fpext float 1.0 to double
+  ; CHECK-NEXT: fptosi float 1.000000e+00 to i32
+  fptosi float 1.0 to i32
+  ; CHECK-NEXT: uitofp i32 1 to float
+  uitofp i32 1 to float
+  ; CHECK-NEXT: sitofp i32 -1 to float
+  sitofp i32 -1 to float
+  ; CHECK-NEXT: ptrtoint i32* @X to i32
+  ptrtoint i32* @X to i32
+  ; CHECK-NEXT: inttoptr i8 1 to i8*
+  inttoptr i8 1 to i8*
+  ; CHECK-NEXT: bitcast i32 1 to <2 x i16>
+  bitcast i32 1 to <2 x i16>
+  ; CHECK-NEXT: getelementptr i32* @X, i32 0
+  getelementptr i32* @X, i32 0
+  ; CHECK-NEXT: getelementptr inbounds i32* @X, i32 0
+  getelementptr inbounds i32* @X, i32 0
+  ; CHECK: select i1 true, i32 1, i32 0
+  select i1 true ,i32 1, i32 0
+  ; CHECK-NEXT: icmp eq i32 1, 0
+  icmp eq i32 1, 0
+  ; CHECK-NEXT: fcmp oeq float 1.000000e+00, 0.000000e+00
+  fcmp oeq float 1.0, 0.0
+  ; CHECK-NEXT: extractelement <2 x i32> <i32 1, i32 1>, i32 1
+  extractelement <2 x i32> <i32 1, i32 1>, i32 1
+  ; CHECK-NEXT: insertelement <2 x i32> <i32 1, i32 1>, i32 0, i32 1
+  insertelement <2 x i32> <i32 1, i32 1>, i32 0, i32 1
+  ; CHECK-NEXT: shufflevector <2 x i32> <i32 1, i32 1>, <2 x i32> zeroinitializer, <4 x i32> <i32 0, i32 2, i32 1, i32 3>
+  shufflevector <2 x i32> <i32 1, i32 1>, <2 x i32> zeroinitializer, <4 x i32> <i32 0, i32 2, i32 1, i32 3>
+  ; CHECK-NEXT: extractvalue { i32, float } { i32 1, float 2.000000e+00 }, 0
+  extractvalue { i32, float } { i32 1, float 2.0 }, 0
+  ; CHECK-NEXT: insertvalue { i32, float } { i32 1, float 2.000000e+00 }, i32 0, 0
+  insertvalue { i32, float } { i32 1, float 2.0 }, i32 0, 0
+  
+  ret void
+}
+\ No newline at end of file
diff --git a/test/Bitcode/constantsTest.3.2.ll.bc b/test/Bitcode/constantsTest.3.2.ll.bc
new file mode 100644
index 0000000..8454bef
--- /dev/null
+++ b/test/Bitcode/constantsTest.3.2.ll.bc
diff --git a/test/Bitcode/conversionInstructions.3.2.ll b/test/Bitcode/conversionInstructions.3.2.ll
index 4b3f273..ae2d65e 100644
--- a/test/Bitcode/conversionInstructions.3.2.ll
+++ b/test/Bitcode/conversionInstructions.3.2.ll
@@ -1,104 +1,124 @@
-; RUN:  llvm-dis < %s.bc| FileCheck %s
-
-; conversionOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
-; The test checks that LLVM does not misread conversion instructions from
-; older bitcode files.
-
-define void @trunc(i32 %src){
-entry:
-; CHECK: %res1 = trunc i32 %src to i8
-  %res1 = trunc i32 %src to i8
-    
-  ret void
-}
-
-define void @zext(i32 %src){
-entry:
-; CHECK: %res1 = zext i32 %src to i64
-  %res1 = zext i32 %src to i64
-    
-  ret void
-}
-
-define void @sext(i32 %src){
-entry:
-; CHECK: %res1 = sext i32 %src to i64
-  %res1 = sext i32 %src to i64
-    
-  ret void
-}
-
-define void @fptrunc(double %src){
-entry:
-; CHECK: %res1 = fptrunc double %src to float
-  %res1 = fptrunc double %src to float
-  
-  ret void
-}
-
-define void @fpext(float %src){
-entry:
-; CHECK: %res1 = fpext float %src to double
-  %res1 = fpext float %src to double
-  
-  ret void
-}
-
-define void @fptoui(float %src){
-entry:
-; CHECK: %res1 = fptoui float %src to i32
-  %res1 = fptoui float %src to i32
-  
-  ret void
-}
-
-define void @fptosi(float %src){
-entry:
-; CHECK: %res1 = fptosi float %src to i32
-  %res1 = fptosi float %src to i32
-  
-  ret void
-}
-
-define void @uitofp(i32 %src){
-entry:
-; CHECK: %res1 = uitofp i32 %src to float
-  %res1 = uitofp i32 %src to float
-  
-  ret void
-}
-
-define void @sitofp(i32 %src){
-entry:
-; CHECK: %res1 = sitofp i32 %src to float
-  %res1 = sitofp i32 %src to float
-  
-  ret void
-}
-
-define void @ptrtoint(i32* %src){
-entry:
-; CHECK: %res1 = ptrtoint i32* %src to i8
-  %res1 = ptrtoint i32* %src to i8
-  
-  ret void
-}
-
-define void @inttoptr(i32 %src){
-entry:
-; CHECK: %res1 = inttoptr i32 %src to i32*
-  %res1 = inttoptr i32 %src to i32*
-  
-  ret void
-}
-
-define void @bitcast(i32 %src1, i32* %src2){
-entry:
-; CHECK: %res1 = bitcast i32 %src1 to i32
-  %res1 = bitcast i32 %src1 to i32
-  
-; CHECK: %res2 = bitcast i32* %src2 to i64*
-  %res2 = bitcast i32* %src2 to i64*
-  
-  ret void
-}
-\ No newline at end of file
+; RUN:  llvm-dis < %s.bc| FileCheck %s
+
+; conversionInstructions.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
+; The test checks that LLVM does not misread conversion instructions from
+; older bitcode files.
+
+define void @trunc(i32 %src){
+entry:
+; CHECK: %res1 = trunc i32 %src to i8
+  %res1 = trunc i32 %src to i8
+    
+  ret void
+}
+
+define void @zext(i32 %src){
+entry:
+; CHECK: %res1 = zext i32 %src to i64
+  %res1 = zext i32 %src to i64
+    
+  ret void
+}
+
+define void @sext(i32 %src){
+entry:
+; CHECK: %res1 = sext i32 %src to i64
+  %res1 = sext i32 %src to i64
+    
+  ret void
+}
+
+define void @fptrunc(double %src){
+entry:
+; CHECK: %res1 = fptrunc double %src to float
+  %res1 = fptrunc double %src to float
+  
+  ret void
+}
+
+define void @fpext(float %src){
+entry:
+; CHECK: %res1 = fpext float %src to double
+  %res1 = fpext float %src to double
+  
+  ret void
+}
+
+define void @fptoui(float %src){
+entry:
+; CHECK: %res1 = fptoui float %src to i32
+  %res1 = fptoui float %src to i32
+  
+  ret void
+}
+
+define void @fptosi(float %src){
+entry:
+; CHECK: %res1 = fptosi float %src to i32
+  %res1 = fptosi float %src to i32
+  
+  ret void
+}
+
+define void @uitofp(i32 %src){
+entry:
+; CHECK: %res1 = uitofp i32 %src to float
+  %res1 = uitofp i32 %src to float
+  
+  ret void
+}
+
+define void @sitofp(i32 %src){
+entry:
+; CHECK: %res1 = sitofp i32 %src to float
+  %res1 = sitofp i32 %src to float
+  
+  ret void
+}
+
+define void @ptrtoint(i32* %src){
+entry:
+; CHECK: %res1 = ptrtoint i32* %src to i8
+  %res1 = ptrtoint i32* %src to i8
+  
+  ret void
+}
+
+define void @inttoptr(i32 %src){
+entry:
+; CHECK: %res1 = inttoptr i32 %src to i32*
+  %res1 = inttoptr i32 %src to i32*
+  
+  ret void
+}
+
+define void @bitcast(i32 %src1, i32* %src2){
+entry:
+; CHECK: %res1 = bitcast i32 %src1 to i32
+  %res1 = bitcast i32 %src1 to i32
+  
+; CHECK: %res2 = bitcast i32* %src2 to i64*
+  %res2 = bitcast i32* %src2 to i64*
+  
+  ret void
+}
+
+define void @ptrtointInstr(i32* %ptr, <4 x i32*> %vecPtr){
+entry:
+; CHECK: %res1 = ptrtoint i32* %ptr to i8
+  %res1 = ptrtoint i32* %ptr to i8  
+; CHECK-NEXT: %res2 = ptrtoint <4 x i32*> %vecPtr to <4 x i64>
+  %res2 = ptrtoint <4 x i32*> %vecPtr to <4 x i64>
+  
+  ret void
+}
+
+define void @inttoptrInstr(i32 %x, <4 x i32> %vec){
+entry:
+; CHECK: %res1 = inttoptr i32 %x to i64*
+  %res1 = inttoptr i32 %x to i64*
+; CHECK-NEXT: inttoptr <4 x i32> %vec to <4 x i8*>
+  %res2 = inttoptr <4 x i32> %vec to <4 x i8*>
+  
+  ret void
+}
diff --git a/test/Bitcode/conversionInstructions.3.2.ll.bc b/test/Bitcode/conversionInstructions.3.2.ll.bc
index fabf7da..a6f8a47 100644
--- a/test/Bitcode/conversionInstructions.3.2.ll.bc
+++ b/test/Bitcode/conversionInstructions.3.2.ll.bc
diff --git a/test/Bitcode/deprecated-linker_private-linker_private_weak.ll b/test/Bitcode/deprecated-linker_private-linker_private_weak.ll
deleted file mode 100644
index 12a527c..0000000
--- a/test/Bitcode/deprecated-linker_private-linker_private_weak.ll
+++ /dev/null
@@ -1,17 +0,0 @@
-; RUN: llvm-as -o - %s | llvm-dis | FileCheck %s
-; RUN: llvm-as -o /dev/null %s 2>&1 | FileCheck %s -check-prefix CHECK-WARNINGS
-
-@.linker_private = linker_private unnamed_addr constant [15 x i8] c"linker_private\00", align 64
-@.linker_private_weak = linker_private_weak unnamed_addr constant [20 x i8] c"linker_private_weak\00", align 64
-
-; CHECK: @.linker_private = private unnamed_addr constant [15 x i8] c"linker_private\00", align 64
-; CHECK: @.linker_private_weak = private unnamed_addr constant [20 x i8] c"linker_private_weak\00", align 64
-
-; CHECK-WARNINGS: warning: '.linker_private' is deprecated, treating as PrivateLinkage
-; CHECK-WARNINGS: @.linker_private = linker_private unnamed_addr constant [15 x i8] c"linker_private\00", align 64
-; CHECK-WARNINGS:                    ^
-
-; CHECK-WARNINGS: warning: '.linker_private_weak' is deprecated, treating as PrivateLinkage
-; CHECK-WARNINGS: @.linker_private_weak = linker_private_weak unnamed_addr constant [20 x i8] c"linker_private_weak\00", align 64
-; CHECK-WARNINGS:                         ^
-
diff --git a/test/Bitcode/drop-debug-info.ll b/test/Bitcode/drop-debug-info.ll
index 5123018..a2f5694 100644
--- a/test/Bitcode/drop-debug-info.ll
+++ b/test/Bitcode/drop-debug-info.ll
@@ -1,5 +1,6 @@
 ; RUN: llvm-as < %s -o %t.bc 2>&1 >/dev/null | FileCheck -check-prefix=WARN %s
 ; RUN: llvm-dis < %t.bc | FileCheck %s
+; RUN: verify-uselistorder < %t.bc
 
 define i32 @main() {
 entry:
@@ -11,15 +12,15 @@ entry:
 !llvm.dbg.cu = !{!0}
 !llvm.module.flags = !{!9}
 
-!0 = metadata !{i32 786449, metadata !1, i32 12, metadata !"clang version 3.5 (trunk 195495) (llvm/trunk 195495:195504M)", i1 false, metadata !"", i32 0, metadata !2, metadata !2, metadata !3, metadata !2, metadata !2, metadata !""} ; [ DW_TAG_compile_unit ] [/Users/manmanren/llvm_gmail/release/../llvm/tools/clang/test/CodeGen/debug-info-version.c] [DW_LANG_C99]
+!0 = metadata !{metadata !"0x11\0012\00clang version 3.5 (trunk 195495) (llvm/trunk 195495:195504M)\000\00\000\00\000", metadata !1, metadata !2, metadata !2, metadata !3, metadata !2, metadata !2} ; [ DW_TAG_compile_unit ] [/Users/manmanren/llvm_gmail/release/../llvm/tools/clang/test/CodeGen/debug-info-version.c] [DW_LANG_C99]
 !1 = metadata !{metadata !"../llvm/tools/clang/test/CodeGen/debug-info-version.c", metadata !"/Users/manmanren/llvm_gmail/release"}
 !2 = metadata !{i32 0}
 !3 = metadata !{metadata !4}
-!4 = metadata !{i32 786478, metadata !1, metadata !5, metadata !"main", metadata !"main", metadata !"", i32 3, metadata !6, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 ()* @main, null, null, metadata !2, i32 3} ; [ DW_TAG_subprogram ] [line 3] [def] [main]
-!5 = metadata !{i32 786473, metadata !1}          ; [ DW_TAG_file_type ] [/Users/manmanren/llvm_gmail/release/../llvm/tools/clang/test/CodeGen/debug-info-version.c]
-!6 = metadata !{i32 786453, i32 0, null, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !7, i32 0, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ]
+!4 = metadata !{metadata !"0x2e\00main\00main\00\003\000\001\000\006\00256\000\003", metadata !1, metadata !5, metadata !6, null, i32 ()* @main, null, null, metadata !2} ; [ DW_TAG_subprogram ] [line 3] [def] [main]
+!5 = metadata !{metadata !"0x29", metadata !1}          ; [ DW_TAG_file_type ] [/Users/manmanren/llvm_gmail/release/../llvm/tools/clang/test/CodeGen/debug-info-version.c]
+!6 = metadata !{metadata !"0x15\00\000\000\000\000\000\000", i32 0, null, null, metadata !7, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ]
 !7 = metadata !{metadata !8}
-!8 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed]
+!8 = metadata !{metadata !"0x24\00int\000\0032\0032\000\000\005", null, null} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed]
 !9 = metadata !{i32 2, metadata !"Dwarf Version", i32 2}
 !12 = metadata !{i32 4, i32 0, metadata !4, null}
 
diff --git a/test/Bitcode/extractelement.ll b/test/Bitcode/extractelement.ll
index 8999c65..90a883d 100644
--- a/test/Bitcode/extractelement.ll
+++ b/test/Bitcode/extractelement.ll
@@ -1,4 +1,5 @@
 ; RUN: opt < %s -constprop | llvm-dis -disable-output
+; RUN: verify-uselistorder < %s
 ; PR3465
 
 define double @test() {
diff --git a/test/Bitcode/flags.ll b/test/Bitcode/flags.ll
index 7b0c5b5..6febaa6 100644
--- a/test/Bitcode/flags.ll
+++ b/test/Bitcode/flags.ll
@@ -1,6 +1,7 @@
 ; RUN: llvm-as < %s | llvm-dis > %t0
 ; RUN: opt -S < %s > %t1
 ; RUN: diff %t0 %t1
+; RUN: verify-uselistorder < %s
 ; PR6140
 
 ; Make sure the flags are serialized/deserialized properly for both
diff --git a/test/Bitcode/function-encoding-rel-operands.ll b/test/Bitcode/function-encoding-rel-operands.ll
index aedb0c3..24d6d80 100644
--- a/test/Bitcode/function-encoding-rel-operands.ll
+++ b/test/Bitcode/function-encoding-rel-operands.ll
@@ -1,6 +1,7 @@
 ; Basic sanity test to check that instruction operands are encoded with
 ; relative IDs.
 ; RUN: llvm-as < %s | llvm-bcanalyzer -dump | FileCheck %s
+; RUN: verify-uselistorder < %s
 
 ; CHECK: FUNCTION_BLOCK
 ; CHECK: INST_BINOP {{.*}}op0=1 op1=1
@@ -47,3 +48,5 @@ entry:
   %2 = icmp eq i32 %1, %a
   ret i1 %2
 }
+
+; CHECK: Stream type: LLVM IR
diff --git a/test/Bitcode/global-variables.3.2.ll b/test/Bitcode/global-variables.3.2.ll
index 549d025..afd9cb1 100644
--- a/test/Bitcode/global-variables.3.2.ll
+++ b/test/Bitcode/global-variables.3.2.ll
@@ -1,4 +1,5 @@
 ; RUN:  llvm-dis < %s.bc| FileCheck %s
+; RUN:  verify-uselistorder < %s.bc
 
 ; global-variables.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
 ; The test checks that LLVM does not silently misread global variables attributes of
diff --git a/test/Bitcode/highLevelStructure.3.2.ll b/test/Bitcode/highLevelStructure.3.2.ll
new file mode 100644
index 0000000..f9509eb
--- /dev/null
+++ b/test/Bitcode/highLevelStructure.3.2.ll
@@ -0,0 +1,86 @@
+; RUN:  llvm-dis < %s.bc| FileCheck %s
+
+; highLevelStructure.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
+; The test checks that LLVM does not misread binary float instructions of
+; older bitcode files.
+
+; Data Layout Test
+; CHECK: target datalayout = "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-f80:32-n8:16:32-S32"
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96:128:128-v128:128:128-v192:256:256-v256:256:256-v512:512:512-v1024:1024:1024-a0:0:64-f80:32:32-n8:16:32-S32"
+
+; Module-Level Inline Assembly Test
+; CHECK: module asm "some assembly"
+module asm "some assembly"
+
+; Named Types Test
+; CHECK: %mytype = type { %mytype*, i32 }
+%mytype = type { %mytype*, i32 }
+
+; Aliases Test
+; CHECK: @glob1 = global i32 1
+@glob1 = global i32 1
+; CHECK: @aliased1 = alias i32* @glob1
+@aliased1 = alias i32* @glob1
+; CHECK-NEXT: @aliased2 = internal alias i32* @glob1
+@aliased2 = internal alias i32* @glob1
+; CHECK-NEXT: @aliased3 = alias i32* @glob1
+@aliased3 = external alias i32* @glob1
+; CHECK-NEXT: @aliased4 = weak alias i32* @glob1
+@aliased4 = weak alias i32* @glob1
+; CHECK-NEXT: @aliased5 = weak_odr alias i32* @glob1
+@aliased5 = weak_odr alias i32* @glob1
+
+;Parameter Attribute Test
+; CHECK: declare void @ParamAttr1(i8 zeroext)
+declare void @ParamAttr1(i8 zeroext)
+; CHECK: declare void @ParamAttr2(i8* nest)
+declare void @ParamAttr2(i8* nest)
+; CHECK: declare void @ParamAttr3(i8* sret)
+declare void @ParamAttr3(i8* sret)
+; CHECK: declare void @ParamAttr4(i8 signext)
+declare void @ParamAttr4(i8 signext)
+; CHECK: declare void @ParamAttr5(i8* inreg)
+declare void @ParamAttr5(i8* inreg)
+; CHECK: declare void @ParamAttr6(i8* byval)
+declare void @ParamAttr6(i8* byval)
+; CHECK: declare void @ParamAttr7(i8* noalias)
+declare void @ParamAttr7(i8* noalias)
+; CHECK: declare void @ParamAttr8(i8* nocapture)
+declare void @ParamAttr8(i8* nocapture)
+; CHECK: declare void @ParamAttr9{{[(i8* nest noalias nocapture) | (i8* noalias nocapture nest)]}}
+declare void @ParamAttr9(i8* nest noalias nocapture)
+; CHECK: declare void @ParamAttr10{{[(i8* sret noalias nocapture) | (i8* noalias nocapture sret)]}}
+declare void @ParamAttr10(i8* sret noalias nocapture)
+;CHECK: declare void @ParamAttr11{{[(i8* byval noalias nocapture) | (i8* noalias nocapture byval)]}}
+declare void @ParamAttr11(i8* byval noalias nocapture)
+;CHECK: declare void @ParamAttr12{{[(i8* inreg noalias nocapture) | (i8* noalias nocapture inreg)]}}
+declare void @ParamAttr12(i8* inreg noalias nocapture)
+
+
+; NamedTypesTest
+define void @NamedTypes() {
+entry:
+; CHECK: %res = alloca %mytype
+  %res = alloca %mytype
+  ret void
+}
+
+; Garbage Collector Name Test
+; CHECK: define void @gcTest() gc "gc"
+define void @gcTest() gc "gc" {
+entry:
+  ret void
+}
+
+; Named metadata Test
+; CHECK: !name = !{!0, !1, !2}
+!name = !{!0, !1, !2}
+; CHECK: !0 = metadata !{metadata !"zero"}
+!0 = metadata !{metadata !"zero"}
+; CHECK: !1 = metadata !{metadata !"one"}
+!1 = metadata !{metadata !"one"}
+; CHECK: !2 = metadata !{metadata !"two"}
+!2 = metadata !{metadata !"two"}
+
+
+
diff --git a/test/Bitcode/highLevelStructure.3.2.ll.bc b/test/Bitcode/highLevelStructure.3.2.ll.bc
new file mode 100644
index 0000000..591c5c3
--- /dev/null
+++ b/test/Bitcode/highLevelStructure.3.2.ll.bc
diff --git a/test/Bitcode/inalloca.ll b/test/Bitcode/inalloca.ll
new file mode 100644
index 0000000..84abe17
--- /dev/null
+++ b/test/Bitcode/inalloca.ll
@@ -0,0 +1,19 @@
+; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+; RUN: verify-uselistorder < %s
+
+; inalloca should roundtrip.
+
+define void @foo(i32* inalloca %args) {
+  ret void
+}
+; CHECK-LABEL: define void @foo(i32* inalloca %args)
+
+define void @bar() {
+  ; Use the maximum alignment, since we stuff our bit with alignment.
+  %args = alloca inalloca i32, align 536870912
+  call void @foo(i32* inalloca %args)
+  ret void
+}
+; CHECK-LABEL: define void @bar() {
+; CHECK: %args = alloca inalloca i32, align 536870912
+; CHECK: call void @foo(i32* inalloca %args)
diff --git a/test/Bitcode/linkage-types-3.2.ll b/test/Bitcode/linkage-types-3.2.ll
index fd070ef..dc6c90c 100644
--- a/test/Bitcode/linkage-types-3.2.ll
+++ b/test/Bitcode/linkage-types-3.2.ll
@@ -1,4 +1,5 @@
 ; RUN:  llvm-dis < %s.bc| FileCheck %s
+; RUN:  verify-uselistorder < %s.bc
 
 ; linkage-types-3.2.ll.bc was generated by passing this file to llvm-as-3.2
 ; The test checks that LLVM does not silently misread linkage types of
diff --git a/test/Bitcode/local-linkage-default-visibility.3.4.ll b/test/Bitcode/local-linkage-default-visibility.3.4.ll
index 45a7b12..df0cf76 100644
--- a/test/Bitcode/local-linkage-default-visibility.3.4.ll
+++ b/test/Bitcode/local-linkage-default-visibility.3.4.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-dis < %s.bc | FileCheck %s
+; RUN: verify-uselistorder < %s.bc
 
 ; local-linkage-default-visibility.3.4.ll.bc was generated by passing this file
 ; to llvm-as-3.4.  The test checks that LLVM upgrades visibility of symbols
@@ -25,22 +26,22 @@
 @global = global i32 0
 
 @default.internal.alias = alias internal i32* @global
-; CHECK: @default.internal.alias = alias internal i32* @global
+; CHECK: @default.internal.alias = internal alias i32* @global
 
 @hidden.internal.alias = hidden alias internal i32* @global
-; CHECK: @hidden.internal.alias = alias internal i32* @global
+; CHECK: @hidden.internal.alias = internal alias i32* @global
 
 @protected.internal.alias = protected alias internal i32* @global
-; CHECK: @protected.internal.alias = alias internal i32* @global
+; CHECK: @protected.internal.alias = internal alias i32* @global
 
 @default.private.alias = alias private i32* @global
-; CHECK: @default.private.alias = alias private i32* @global
+; CHECK: @default.private.alias = private alias i32* @global
 
 @hidden.private.alias = hidden alias private i32* @global
-; CHECK: @hidden.private.alias = alias private i32* @global
+; CHECK: @hidden.private.alias = private alias i32* @global
 
 @protected.private.alias = protected alias private i32* @global
-; CHECK: @protected.private.alias = alias private i32* @global
+; CHECK: @protected.private.alias = private alias i32* @global
 
 define internal void @default.internal() {
 ; CHECK: define internal void @default.internal
diff --git a/test/Bitcode/memInstructions.3.2.ll b/test/Bitcode/memInstructions.3.2.ll
index e4cb6bd..d826dd1 100644
--- a/test/Bitcode/memInstructions.3.2.ll
+++ b/test/Bitcode/memInstructions.3.2.ll
@@ -1,328 +1,329 @@
-; RUN:  llvm-dis < %s.bc| FileCheck %s
-
-; memOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
-; The test checks that LLVM does not misread memory related instructions of
-; older bitcode files.
-
-define void @alloca(){
-entry:
-; CHECK: %res1 = alloca i8
-  %res1 = alloca i8
-  
-; CHECK-NEXT: %res2 = alloca i8, i32 2
-  %res2 = alloca i8, i32 2
-
-; CHECK-NEXT: %res3 = alloca i8, i32 2, align 4
-  %res3 = alloca i8, i32 2, align 4
-  
-; CHECK-NEXT: %res4 = alloca i8, align 4
-  %res4 = alloca i8, align 4
-  
-  ret void
-}
-
-define void @load(){
-entry:
-  %ptr1 = alloca i8
-  store i8 2, i8* %ptr1
-  
-; CHECK: %res1 = load i8* %ptr1
-  %res1 = load i8* %ptr1
-  
-; CHECK-NEXT: %res2 = load volatile i8* %ptr1
-  %res2 = load volatile i8* %ptr1
-  
-; CHECK-NEXT: %res3 = load i8* %ptr1, align 1
-  %res3 = load i8* %ptr1, align 1
-  
-; CHECK-NEXT: %res4 = load volatile i8* %ptr1, align 1
-  %res4 = load volatile i8* %ptr1, align 1
-  
-; CHECK-NEXT: %res5 = load i8* %ptr1, !nontemporal !0
-  %res5 = load i8* %ptr1, !nontemporal !0
-  
-; CHECK-NEXT: %res6 = load volatile i8* %ptr1, !nontemporal !0
-  %res6 = load volatile i8* %ptr1, !nontemporal !0
-  
-; CHECK-NEXT: %res7 = load i8* %ptr1, align 1, !nontemporal !0
-  %res7 = load i8* %ptr1, align 1, !nontemporal !0
-  
-; CHECK-NEXT: %res8 = load volatile i8* %ptr1, align 1, !nontemporal !0
-  %res8 = load volatile i8* %ptr1, align 1, !nontemporal !0
-  
-; CHECK-NEXT: %res9 = load i8* %ptr1, !invariant.load !1
-  %res9 = load i8* %ptr1, !invariant.load !1
-  
-; CHECK-NEXT: %res10 = load volatile i8* %ptr1, !invariant.load !1
-  %res10 = load volatile i8* %ptr1, !invariant.load !1
-  
-; CHECK-NEXT: %res11 = load i8* %ptr1, align 1, !invariant.load !1
-  %res11 = load i8* %ptr1, align 1, !invariant.load !1
-  
-; CHECK-NEXT: %res12 = load volatile i8* %ptr1, align 1, !invariant.load !1
-  %res12 = load volatile i8* %ptr1, align 1, !invariant.load !1
-  
-; CHECK-NEXT: %res13 = load i8* %ptr1, {{[(!nontemporal !0, !invariant.load !1) | (!invariant.load !1, !nontemporal !0)]}}
-  %res13 = load i8* %ptr1, !nontemporal !0, !invariant.load !1
-  
-; CHECK-NEXT: %res14 = load volatile i8* %ptr1, {{[(!nontemporal !0, !invariant.load !1) | (!invariant.load !1, !nontemporal !0)]}}
-  %res14 = load volatile i8* %ptr1, !nontemporal !0, !invariant.load !1
-  
-; CHECK-NEXT: %res15 = load i8* %ptr1, align 1, {{[(!nontemporal !0, !invariant.load !1) | (!invariant.load !1, !nontemporal !0)]}}
-  %res15 = load i8* %ptr1, align 1, !nontemporal !0, !invariant.load !1
-  
-; CHECK-NEXT: %res16 = load volatile i8* %ptr1, align 1, {{[(!nontemporal !0, !invariant.load !1) | (!invariant.load !1, !nontemporal !0)]}}
-  %res16 = load volatile i8* %ptr1, align 1, !nontemporal !0, !invariant.load !1
-  
-  ret void
-}
-
-define void @loadAtomic(){
-entry:
-  %ptr1 = alloca i8
-  store i8 2, i8* %ptr1
-  
-; CHECK: %res1 = load atomic i8* %ptr1 unordered, align 1
-  %res1 = load atomic i8* %ptr1 unordered, align 1
-  
-; CHECK-NEXT: %res2 = load atomic i8* %ptr1 monotonic, align 1
-  %res2 = load atomic i8* %ptr1 monotonic, align 1
-  
-; CHECK-NEXT: %res3 = load atomic i8* %ptr1 acquire, align 1
-  %res3 = load atomic i8* %ptr1 acquire, align 1
-  
-; CHECK-NEXT: %res4 = load atomic i8* %ptr1 seq_cst, align 1
-  %res4 = load atomic i8* %ptr1 seq_cst, align 1
-  
-; CHECK-NEXT: %res5 = load atomic volatile i8* %ptr1 unordered, align 1
-  %res5 = load atomic volatile i8* %ptr1 unordered, align 1
-  
-; CHECK-NEXT: %res6 = load atomic volatile i8* %ptr1 monotonic, align 1
-  %res6 = load atomic volatile i8* %ptr1 monotonic, align 1
-  
-; CHECK-NEXT: %res7 = load atomic volatile i8* %ptr1 acquire, align 1
-  %res7 = load atomic volatile i8* %ptr1 acquire, align 1
-  
-; CHECK-NEXT: %res8 = load atomic volatile i8* %ptr1 seq_cst, align 1
-  %res8 = load atomic volatile i8* %ptr1 seq_cst, align 1
-  
-; CHECK-NEXT: %res9 = load atomic i8* %ptr1 singlethread unordered, align 1
-  %res9 = load atomic i8* %ptr1 singlethread unordered, align 1
-  
-; CHECK-NEXT: %res10 = load atomic i8* %ptr1 singlethread monotonic, align 1
-  %res10 = load atomic i8* %ptr1 singlethread monotonic, align 1
-  
-; CHECK-NEXT: %res11 = load atomic i8* %ptr1 singlethread acquire, align 1
-  %res11 = load atomic i8* %ptr1 singlethread acquire, align 1
-  
-; CHECK-NEXT: %res12 = load atomic i8* %ptr1 singlethread seq_cst, align 1
-  %res12 = load atomic i8* %ptr1 singlethread seq_cst, align 1
-  
-; CHECK-NEXT: %res13 = load atomic volatile i8* %ptr1 singlethread unordered, align 1
-  %res13 = load atomic volatile i8* %ptr1 singlethread unordered, align 1
-  
-; CHECK-NEXT: %res14 = load atomic volatile i8* %ptr1 singlethread monotonic, align 1
-  %res14 = load atomic volatile i8* %ptr1 singlethread monotonic, align 1
-  
-; CHECK-NEXT: %res15 = load atomic volatile i8* %ptr1 singlethread acquire, align 1
-  %res15 = load atomic volatile i8* %ptr1 singlethread acquire, align 1
-  
-; CHECK-NEXT: %res16 = load atomic volatile i8* %ptr1 singlethread seq_cst, align 1
-  %res16 = load atomic volatile i8* %ptr1 singlethread seq_cst, align 1
-  
-  ret void
-}
-
-define void @store(){
-entry:
-  %ptr1 = alloca i8
-  
-; CHECK: store i8 2, i8* %ptr1
-  store i8 2, i8* %ptr1
-  
-; CHECK-NEXT: store volatile i8 2, i8* %ptr1
-  store volatile i8 2, i8* %ptr1
-  
-; CHECK-NEXT: store i8 2, i8* %ptr1, align 1
-  store i8 2, i8* %ptr1, align 1
-  
-; CHECK-NEXT: store volatile i8 2, i8* %ptr1, align 1
-  store volatile i8 2, i8* %ptr1, align 1
-  
-; CHECK-NEXT: store i8 2, i8* %ptr1, !nontemporal !0
-  store i8 2, i8* %ptr1, !nontemporal !0
-  
-; CHECK-NEXT: store volatile i8 2, i8* %ptr1, !nontemporal !0
-  store volatile i8 2, i8* %ptr1, !nontemporal !0
-  
-; CHECK-NEXT: store i8 2, i8* %ptr1, align 1, !nontemporal !0
-  store i8 2, i8* %ptr1, align 1, !nontemporal !0
-  
-; CHECK-NEXT: store volatile i8 2, i8* %ptr1, align 1, !nontemporal !0
-  store volatile i8 2, i8* %ptr1, align 1, !nontemporal !0
-  
-  ret void
-}
-
-define void @storeAtomic(){
-entry:
-  %ptr1 = alloca i8
-  
-; CHECK: store atomic i8 2, i8* %ptr1 unordered, align 1
-  store atomic i8 2, i8* %ptr1 unordered, align 1
-  
-; CHECK-NEXT: store atomic i8 2, i8* %ptr1 monotonic, align 1
-  store atomic i8 2, i8* %ptr1 monotonic, align 1
-  
-; CHECK-NEXT: store atomic i8 2, i8* %ptr1 release, align 1
-  store atomic i8 2, i8* %ptr1 release, align 1
-  
-; CHECK-NEXT: store atomic i8 2, i8* %ptr1 seq_cst, align 1
-  store atomic i8 2, i8* %ptr1 seq_cst, align 1
-  
-; CHECK-NEXT: store atomic volatile i8 2, i8* %ptr1 unordered, align 1
-  store atomic volatile i8 2, i8* %ptr1 unordered, align 1
-  
-; CHECK-NEXT: store atomic volatile i8 2, i8* %ptr1 monotonic, align 1
-  store atomic volatile i8 2, i8* %ptr1 monotonic, align 1
-  
-; CHECK-NEXT: store atomic volatile i8 2, i8* %ptr1 release, align 1
-  store atomic volatile i8 2, i8* %ptr1 release, align 1
-  
-; CHECK-NEXT: store atomic volatile i8 2, i8* %ptr1 seq_cst, align 1
-  store atomic volatile i8 2, i8* %ptr1 seq_cst, align 1
-  
-; CHECK-NEXT: store atomic i8 2, i8* %ptr1 singlethread unordered, align 1
-  store atomic i8 2, i8* %ptr1 singlethread unordered, align 1
-  
-; CHECK-NEXT: store atomic i8 2, i8* %ptr1 singlethread monotonic, align 1
-  store atomic i8 2, i8* %ptr1 singlethread monotonic, align 1
-  
-; CHECK-NEXT: store atomic i8 2, i8* %ptr1 singlethread release, align 1
-  store atomic i8 2, i8* %ptr1 singlethread release, align 1
-  
-; CHECK-NEXT: store atomic i8 2, i8* %ptr1 singlethread seq_cst, align 1
-  store atomic i8 2, i8* %ptr1 singlethread seq_cst, align 1
-  
-; CHECK-NEXT: store atomic volatile i8 2, i8* %ptr1 singlethread unordered, align 1
-  store atomic volatile i8 2, i8* %ptr1 singlethread unordered, align 1
-  
-; CHECK-NEXT: store atomic volatile i8 2, i8* %ptr1 singlethread monotonic, align 1
-  store atomic volatile i8 2, i8* %ptr1 singlethread monotonic, align 1
-  
-; CHECK-NEXT: store atomic volatile i8 2, i8* %ptr1 singlethread release, align 1
-  store atomic volatile i8 2, i8* %ptr1 singlethread release, align 1
-  
-; CHECK-NEXT: store atomic volatile i8 2, i8* %ptr1 singlethread seq_cst, align 1
-  store atomic volatile i8 2, i8* %ptr1 singlethread seq_cst, align 1
-  
-  ret void
-}
-
-define void @cmpxchg(i32* %ptr,i32 %cmp,i32 %new){
-entry:
-  ;cmpxchg [volatile] <ty>* <pointer>, <ty> <cmp>, <ty> <new> [singlethread] <ordering>
-
-; CHECK: [[TMP:%[a-z0-9]+]] = cmpxchg i32* %ptr, i32 %cmp, i32 %new monotonic monotonic
-; CHECK-NEXT: %res1 = extractvalue { i32, i1 } [[TMP]], 0
-  %res1 = cmpxchg i32* %ptr, i32 %cmp, i32 %new monotonic monotonic
-  
-; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new monotonic monotonic
-; CHECK-NEXT: %res2 = extractvalue { i32, i1 } [[TMP]], 0
-  %res2 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new monotonic monotonic
-  
-; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg i32* %ptr, i32 %cmp, i32 %new singlethread monotonic monotonic
-; CHECK-NEXT: %res3 = extractvalue { i32, i1 } [[TMP]], 0
-  %res3 = cmpxchg i32* %ptr, i32 %cmp, i32 %new singlethread monotonic monotonic
-  
-; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new singlethread monotonic monotonic
-; CHECK-NEXT: %res4 = extractvalue { i32, i1 } [[TMP]], 0
-  %res4 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new singlethread monotonic monotonic
-  
-  
-; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg i32* %ptr, i32 %cmp, i32 %new acquire acquire
-; CHECK-NEXT: %res5 = extractvalue { i32, i1 } [[TMP]], 0
-  %res5 = cmpxchg i32* %ptr, i32 %cmp, i32 %new acquire acquire
-  
-; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new acquire acquire
-; CHECK-NEXT: %res6 = extractvalue { i32, i1 } [[TMP]], 0
-  %res6 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new acquire acquire
-  
-; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg i32* %ptr, i32 %cmp, i32 %new singlethread acquire acquire
-; CHECK-NEXT: %res7 = extractvalue { i32, i1 } [[TMP]], 0
-  %res7 = cmpxchg i32* %ptr, i32 %cmp, i32 %new singlethread acquire acquire
-  
-; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new singlethread acquire acquire
-; CHECK-NEXT: %res8 = extractvalue { i32, i1 } [[TMP]], 0
-  %res8 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new singlethread acquire acquire
-  
-  
-; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg i32* %ptr, i32 %cmp, i32 %new release monotonic
-; CHECK-NEXT: %res9 = extractvalue { i32, i1 } [[TMP]], 0
-  %res9 = cmpxchg i32* %ptr, i32 %cmp, i32 %new release monotonic
-  
-; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new release monotonic
-; CHECK-NEXT: %res10 = extractvalue { i32, i1 } [[TMP]], 0
-  %res10 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new release monotonic
-  
-; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg i32* %ptr, i32 %cmp, i32 %new singlethread release monotonic
-; CHECK-NEXT: %res11 = extractvalue { i32, i1 } [[TMP]], 0
-  %res11 = cmpxchg i32* %ptr, i32 %cmp, i32 %new singlethread release monotonic
-  
-; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new singlethread release monotonic
-; CHECK-NEXT: %res12 = extractvalue { i32, i1 } [[TMP]], 0
-  %res12 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new singlethread release monotonic
-  
-  
-; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg i32* %ptr, i32 %cmp, i32 %new acq_rel acquire
-; CHECK-NEXT: %res13 = extractvalue { i32, i1 } [[TMP]], 0
-  %res13 = cmpxchg i32* %ptr, i32 %cmp, i32 %new acq_rel acquire
-  
-; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new acq_rel acquire
-; CHECK-NEXT: %res14 = extractvalue { i32, i1 } [[TMP]], 0
-  %res14 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new acq_rel acquire
-  
-; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg i32* %ptr, i32 %cmp, i32 %new singlethread acq_rel acquire
-; CHECK-NEXT: %res15 = extractvalue { i32, i1 } [[TMP]], 0
-  %res15 = cmpxchg i32* %ptr, i32 %cmp, i32 %new singlethread acq_rel acquire
-  
-; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new singlethread acq_rel acquire
-; CHECK-NEXT: %res16 = extractvalue { i32, i1 } [[TMP]], 0
-  %res16 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new singlethread acq_rel acquire
-  
-  
-; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg i32* %ptr, i32 %cmp, i32 %new seq_cst seq_cst
-; CHECK-NEXT: %res17 = extractvalue { i32, i1 } [[TMP]], 0
-  %res17 = cmpxchg i32* %ptr, i32 %cmp, i32 %new seq_cst seq_cst
-  
-; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new seq_cst seq_cst
-; CHECK-NEXT: %res18 = extractvalue { i32, i1 } [[TMP]], 0
-  %res18 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new seq_cst seq_cst
-  
-; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg i32* %ptr, i32 %cmp, i32 %new singlethread seq_cst seq_cst
-; CHECK-NEXT: %res19 = extractvalue { i32, i1 } [[TMP]], 0
-  %res19 = cmpxchg i32* %ptr, i32 %cmp, i32 %new singlethread seq_cst seq_cst
-  
-; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new singlethread seq_cst seq_cst
-; CHECK-NEXT: %res20 = extractvalue { i32, i1 } [[TMP]], 0
-  %res20 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new singlethread seq_cst seq_cst
-
-  ret void
-}
-
-define void @getelementptr({i8, i8}* %s, <4 x i8*> %ptrs, <4 x i64> %offsets ){
-entry:
-; CHECK: %res1 = getelementptr { i8, i8 }* %s, i32 1, i32 1
-  %res1 = getelementptr {i8, i8}* %s, i32 1, i32 1
-  
-; CHECK-NEXT: %res2 = getelementptr inbounds { i8, i8 }* %s, i32 1, i32 1
-  %res2 = getelementptr inbounds {i8, i8}* %s, i32 1, i32 1
-  
-; CHECK-NEXT: %res3 = getelementptr <4 x i8*> %ptrs, <4 x i64> %offsets
-  %res3 = getelementptr <4 x i8*> %ptrs, <4 x i64> %offsets
-  
-  ret void
-}
-
-!0 = metadata !{ i32 1 }
-!1 = metadata !{}
-\ No newline at end of file
+; RUN: llvm-dis < %s.bc| FileCheck %s
+; RUN: verify-uselistorder < %s.bc
+
+; memOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
+; The test checks that LLVM does not misread memory related instructions of
+; older bitcode files.
+
+define void @alloca(){
+entry:
+; CHECK: %res1 = alloca i8
+  %res1 = alloca i8
+
+; CHECK-NEXT: %res2 = alloca i8, i32 2
+  %res2 = alloca i8, i32 2
+
+; CHECK-NEXT: %res3 = alloca i8, i32 2, align 4
+  %res3 = alloca i8, i32 2, align 4
+
+; CHECK-NEXT: %res4 = alloca i8, align 4
+  %res4 = alloca i8, align 4
+
+  ret void
+}
+
+define void @load(){
+entry:
+  %ptr1 = alloca i8
+  store i8 2, i8* %ptr1
+
+; CHECK: %res1 = load i8* %ptr1
+  %res1 = load i8* %ptr1
+
+; CHECK-NEXT: %res2 = load volatile i8* %ptr1
+  %res2 = load volatile i8* %ptr1
+
+; CHECK-NEXT: %res3 = load i8* %ptr1, align 1
+  %res3 = load i8* %ptr1, align 1
+
+; CHECK-NEXT: %res4 = load volatile i8* %ptr1, align 1
+  %res4 = load volatile i8* %ptr1, align 1
+
+; CHECK-NEXT: %res5 = load i8* %ptr1, !nontemporal !0
+  %res5 = load i8* %ptr1, !nontemporal !0
+
+; CHECK-NEXT: %res6 = load volatile i8* %ptr1, !nontemporal !0
+  %res6 = load volatile i8* %ptr1, !nontemporal !0
+
+; CHECK-NEXT: %res7 = load i8* %ptr1, align 1, !nontemporal !0
+  %res7 = load i8* %ptr1, align 1, !nontemporal !0
+
+; CHECK-NEXT: %res8 = load volatile i8* %ptr1, align 1, !nontemporal !0
+  %res8 = load volatile i8* %ptr1, align 1, !nontemporal !0
+
+; CHECK-NEXT: %res9 = load i8* %ptr1, !invariant.load !1
+  %res9 = load i8* %ptr1, !invariant.load !1
+
+; CHECK-NEXT: %res10 = load volatile i8* %ptr1, !invariant.load !1
+  %res10 = load volatile i8* %ptr1, !invariant.load !1
+
+; CHECK-NEXT: %res11 = load i8* %ptr1, align 1, !invariant.load !1
+  %res11 = load i8* %ptr1, align 1, !invariant.load !1
+
+; CHECK-NEXT: %res12 = load volatile i8* %ptr1, align 1, !invariant.load !1
+  %res12 = load volatile i8* %ptr1, align 1, !invariant.load !1
+
+; CHECK-NEXT: %res13 = load i8* %ptr1, {{[(!nontemporal !0, !invariant.load !1) | (!invariant.load !1, !nontemporal !0)]}}
+  %res13 = load i8* %ptr1, !nontemporal !0, !invariant.load !1
+
+; CHECK-NEXT: %res14 = load volatile i8* %ptr1, {{[(!nontemporal !0, !invariant.load !1) | (!invariant.load !1, !nontemporal !0)]}}
+  %res14 = load volatile i8* %ptr1, !nontemporal !0, !invariant.load !1
+
+; CHECK-NEXT: %res15 = load i8* %ptr1, align 1, {{[(!nontemporal !0, !invariant.load !1) | (!invariant.load !1, !nontemporal !0)]}}
+  %res15 = load i8* %ptr1, align 1, !nontemporal !0, !invariant.load !1
+
+; CHECK-NEXT: %res16 = load volatile i8* %ptr1, align 1, {{[(!nontemporal !0, !invariant.load !1) | (!invariant.load !1, !nontemporal !0)]}}
+  %res16 = load volatile i8* %ptr1, align 1, !nontemporal !0, !invariant.load !1
+
+  ret void
+}
+
+define void @loadAtomic(){
+entry:
+  %ptr1 = alloca i8
+  store i8 2, i8* %ptr1
+
+; CHECK: %res1 = load atomic i8* %ptr1 unordered, align 1
+  %res1 = load atomic i8* %ptr1 unordered, align 1
+
+; CHECK-NEXT: %res2 = load atomic i8* %ptr1 monotonic, align 1
+  %res2 = load atomic i8* %ptr1 monotonic, align 1
+
+; CHECK-NEXT: %res3 = load atomic i8* %ptr1 acquire, align 1
+  %res3 = load atomic i8* %ptr1 acquire, align 1
+
+; CHECK-NEXT: %res4 = load atomic i8* %ptr1 seq_cst, align 1
+  %res4 = load atomic i8* %ptr1 seq_cst, align 1
+
+; CHECK-NEXT: %res5 = load atomic volatile i8* %ptr1 unordered, align 1
+  %res5 = load atomic volatile i8* %ptr1 unordered, align 1
+
+; CHECK-NEXT: %res6 = load atomic volatile i8* %ptr1 monotonic, align 1
+  %res6 = load atomic volatile i8* %ptr1 monotonic, align 1
+
+; CHECK-NEXT: %res7 = load atomic volatile i8* %ptr1 acquire, align 1
+  %res7 = load atomic volatile i8* %ptr1 acquire, align 1
+
+; CHECK-NEXT: %res8 = load atomic volatile i8* %ptr1 seq_cst, align 1
+  %res8 = load atomic volatile i8* %ptr1 seq_cst, align 1
+
+; CHECK-NEXT: %res9 = load atomic i8* %ptr1 singlethread unordered, align 1
+  %res9 = load atomic i8* %ptr1 singlethread unordered, align 1
+
+; CHECK-NEXT: %res10 = load atomic i8* %ptr1 singlethread monotonic, align 1
+  %res10 = load atomic i8* %ptr1 singlethread monotonic, align 1
+
+; CHECK-NEXT: %res11 = load atomic i8* %ptr1 singlethread acquire, align 1
+  %res11 = load atomic i8* %ptr1 singlethread acquire, align 1
+
+; CHECK-NEXT: %res12 = load atomic i8* %ptr1 singlethread seq_cst, align 1
+  %res12 = load atomic i8* %ptr1 singlethread seq_cst, align 1
+
+; CHECK-NEXT: %res13 = load atomic volatile i8* %ptr1 singlethread unordered, align 1
+  %res13 = load atomic volatile i8* %ptr1 singlethread unordered, align 1
+
+; CHECK-NEXT: %res14 = load atomic volatile i8* %ptr1 singlethread monotonic, align 1
+  %res14 = load atomic volatile i8* %ptr1 singlethread monotonic, align 1
+
+; CHECK-NEXT: %res15 = load atomic volatile i8* %ptr1 singlethread acquire, align 1
+  %res15 = load atomic volatile i8* %ptr1 singlethread acquire, align 1
+
+; CHECK-NEXT: %res16 = load atomic volatile i8* %ptr1 singlethread seq_cst, align 1
+  %res16 = load atomic volatile i8* %ptr1 singlethread seq_cst, align 1
+
+  ret void
+}
+
+define void @store(){
+entry:
+  %ptr1 = alloca i8
+
+; CHECK: store i8 2, i8* %ptr1
+  store i8 2, i8* %ptr1
+
+; CHECK-NEXT: store volatile i8 2, i8* %ptr1
+  store volatile i8 2, i8* %ptr1
+
+; CHECK-NEXT: store i8 2, i8* %ptr1, align 1
+  store i8 2, i8* %ptr1, align 1
+
+; CHECK-NEXT: store volatile i8 2, i8* %ptr1, align 1
+  store volatile i8 2, i8* %ptr1, align 1
+
+; CHECK-NEXT: store i8 2, i8* %ptr1, !nontemporal !0
+  store i8 2, i8* %ptr1, !nontemporal !0
+
+; CHECK-NEXT: store volatile i8 2, i8* %ptr1, !nontemporal !0
+  store volatile i8 2, i8* %ptr1, !nontemporal !0
+
+; CHECK-NEXT: store i8 2, i8* %ptr1, align 1, !nontemporal !0
+  store i8 2, i8* %ptr1, align 1, !nontemporal !0
+
+; CHECK-NEXT: store volatile i8 2, i8* %ptr1, align 1, !nontemporal !0
+  store volatile i8 2, i8* %ptr1, align 1, !nontemporal !0
+
+  ret void
+}
+
+define void @storeAtomic(){
+entry:
+  %ptr1 = alloca i8
+
+; CHECK: store atomic i8 2, i8* %ptr1 unordered, align 1
+  store atomic i8 2, i8* %ptr1 unordered, align 1
+
+; CHECK-NEXT: store atomic i8 2, i8* %ptr1 monotonic, align 1
+  store atomic i8 2, i8* %ptr1 monotonic, align 1
+
+; CHECK-NEXT: store atomic i8 2, i8* %ptr1 release, align 1
+  store atomic i8 2, i8* %ptr1 release, align 1
+
+; CHECK-NEXT: store atomic i8 2, i8* %ptr1 seq_cst, align 1
+  store atomic i8 2, i8* %ptr1 seq_cst, align 1
+
+; CHECK-NEXT: store atomic volatile i8 2, i8* %ptr1 unordered, align 1
+  store atomic volatile i8 2, i8* %ptr1 unordered, align 1
+
+; CHECK-NEXT: store atomic volatile i8 2, i8* %ptr1 monotonic, align 1
+  store atomic volatile i8 2, i8* %ptr1 monotonic, align 1
+
+; CHECK-NEXT: store atomic volatile i8 2, i8* %ptr1 release, align 1
+  store atomic volatile i8 2, i8* %ptr1 release, align 1
+
+; CHECK-NEXT: store atomic volatile i8 2, i8* %ptr1 seq_cst, align 1
+  store atomic volatile i8 2, i8* %ptr1 seq_cst, align 1
+
+; CHECK-NEXT: store atomic i8 2, i8* %ptr1 singlethread unordered, align 1
+  store atomic i8 2, i8* %ptr1 singlethread unordered, align 1
+
+; CHECK-NEXT: store atomic i8 2, i8* %ptr1 singlethread monotonic, align 1
+  store atomic i8 2, i8* %ptr1 singlethread monotonic, align 1
+
+; CHECK-NEXT: store atomic i8 2, i8* %ptr1 singlethread release, align 1
+  store atomic i8 2, i8* %ptr1 singlethread release, align 1
+
+; CHECK-NEXT: store atomic i8 2, i8* %ptr1 singlethread seq_cst, align 1
+  store atomic i8 2, i8* %ptr1 singlethread seq_cst, align 1
+
+; CHECK-NEXT: store atomic volatile i8 2, i8* %ptr1 singlethread unordered, align 1
+  store atomic volatile i8 2, i8* %ptr1 singlethread unordered, align 1
+
+; CHECK-NEXT: store atomic volatile i8 2, i8* %ptr1 singlethread monotonic, align 1
+  store atomic volatile i8 2, i8* %ptr1 singlethread monotonic, align 1
+
+; CHECK-NEXT: store atomic volatile i8 2, i8* %ptr1 singlethread release, align 1
+  store atomic volatile i8 2, i8* %ptr1 singlethread release, align 1
+
+; CHECK-NEXT: store atomic volatile i8 2, i8* %ptr1 singlethread seq_cst, align 1
+  store atomic volatile i8 2, i8* %ptr1 singlethread seq_cst, align 1
+
+  ret void
+}
+
+define void @cmpxchg(i32* %ptr,i32 %cmp,i32 %new){
+entry:
+  ;cmpxchg [volatile] <ty>* <pointer>, <ty> <cmp>, <ty> <new> [singlethread] <ordering>
+
+; CHECK: [[TMP:%[a-z0-9]+]] = cmpxchg i32* %ptr, i32 %cmp, i32 %new monotonic monotonic
+; CHECK-NEXT: %res1 = extractvalue { i32, i1 } [[TMP]], 0
+  %res1 = cmpxchg i32* %ptr, i32 %cmp, i32 %new monotonic monotonic
+
+; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new monotonic monotonic
+; CHECK-NEXT: %res2 = extractvalue { i32, i1 } [[TMP]], 0
+  %res2 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new monotonic monotonic
+
+; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg i32* %ptr, i32 %cmp, i32 %new singlethread monotonic monotonic
+; CHECK-NEXT: %res3 = extractvalue { i32, i1 } [[TMP]], 0
+  %res3 = cmpxchg i32* %ptr, i32 %cmp, i32 %new singlethread monotonic monotonic
+
+; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new singlethread monotonic monotonic
+; CHECK-NEXT: %res4 = extractvalue { i32, i1 } [[TMP]], 0
+  %res4 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new singlethread monotonic monotonic
+
+
+; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg i32* %ptr, i32 %cmp, i32 %new acquire acquire
+; CHECK-NEXT: %res5 = extractvalue { i32, i1 } [[TMP]], 0
+  %res5 = cmpxchg i32* %ptr, i32 %cmp, i32 %new acquire acquire
+
+; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new acquire acquire
+; CHECK-NEXT: %res6 = extractvalue { i32, i1 } [[TMP]], 0
+  %res6 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new acquire acquire
+
+; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg i32* %ptr, i32 %cmp, i32 %new singlethread acquire acquire
+; CHECK-NEXT: %res7 = extractvalue { i32, i1 } [[TMP]], 0
+  %res7 = cmpxchg i32* %ptr, i32 %cmp, i32 %new singlethread acquire acquire
+
+; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new singlethread acquire acquire
+; CHECK-NEXT: %res8 = extractvalue { i32, i1 } [[TMP]], 0
+  %res8 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new singlethread acquire acquire
+
+
+; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg i32* %ptr, i32 %cmp, i32 %new release monotonic
+; CHECK-NEXT: %res9 = extractvalue { i32, i1 } [[TMP]], 0
+  %res9 = cmpxchg i32* %ptr, i32 %cmp, i32 %new release monotonic
+
+; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new release monotonic
+; CHECK-NEXT: %res10 = extractvalue { i32, i1 } [[TMP]], 0
+  %res10 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new release monotonic
+
+; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg i32* %ptr, i32 %cmp, i32 %new singlethread release monotonic
+; CHECK-NEXT: %res11 = extractvalue { i32, i1 } [[TMP]], 0
+  %res11 = cmpxchg i32* %ptr, i32 %cmp, i32 %new singlethread release monotonic
+
+; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new singlethread release monotonic
+; CHECK-NEXT: %res12 = extractvalue { i32, i1 } [[TMP]], 0
+  %res12 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new singlethread release monotonic
+
+
+; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg i32* %ptr, i32 %cmp, i32 %new acq_rel acquire
+; CHECK-NEXT: %res13 = extractvalue { i32, i1 } [[TMP]], 0
+  %res13 = cmpxchg i32* %ptr, i32 %cmp, i32 %new acq_rel acquire
+
+; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new acq_rel acquire
+; CHECK-NEXT: %res14 = extractvalue { i32, i1 } [[TMP]], 0
+  %res14 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new acq_rel acquire
+
+; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg i32* %ptr, i32 %cmp, i32 %new singlethread acq_rel acquire
+; CHECK-NEXT: %res15 = extractvalue { i32, i1 } [[TMP]], 0
+  %res15 = cmpxchg i32* %ptr, i32 %cmp, i32 %new singlethread acq_rel acquire
+
+; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new singlethread acq_rel acquire
+; CHECK-NEXT: %res16 = extractvalue { i32, i1 } [[TMP]], 0
+  %res16 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new singlethread acq_rel acquire
+
+
+; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg i32* %ptr, i32 %cmp, i32 %new seq_cst seq_cst
+; CHECK-NEXT: %res17 = extractvalue { i32, i1 } [[TMP]], 0
+  %res17 = cmpxchg i32* %ptr, i32 %cmp, i32 %new seq_cst seq_cst
+
+; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new seq_cst seq_cst
+; CHECK-NEXT: %res18 = extractvalue { i32, i1 } [[TMP]], 0
+  %res18 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new seq_cst seq_cst
+
+; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg i32* %ptr, i32 %cmp, i32 %new singlethread seq_cst seq_cst
+; CHECK-NEXT: %res19 = extractvalue { i32, i1 } [[TMP]], 0
+  %res19 = cmpxchg i32* %ptr, i32 %cmp, i32 %new singlethread seq_cst seq_cst
+
+; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new singlethread seq_cst seq_cst
+; CHECK-NEXT: %res20 = extractvalue { i32, i1 } [[TMP]], 0
+  %res20 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new singlethread seq_cst seq_cst
+
+  ret void
+}
+
+define void @getelementptr({i8, i8}* %s, <4 x i8*> %ptrs, <4 x i64> %offsets ){
+entry:
+; CHECK: %res1 = getelementptr { i8, i8 }* %s, i32 1, i32 1
+  %res1 = getelementptr {i8, i8}* %s, i32 1, i32 1
+
+; CHECK-NEXT: %res2 = getelementptr inbounds { i8, i8 }* %s, i32 1, i32 1
+  %res2 = getelementptr inbounds {i8, i8}* %s, i32 1, i32 1
+
+; CHECK-NEXT: %res3 = getelementptr <4 x i8*> %ptrs, <4 x i64> %offsets
+  %res3 = getelementptr <4 x i8*> %ptrs, <4 x i64> %offsets
+
+  ret void
+}
+
+!0 = metadata !{ i32 1 }
+!1 = metadata !{}
diff --git a/test/Bitcode/metadata-2.ll b/test/Bitcode/metadata-2.ll
index 4055f92..bb957a7 100644
--- a/test/Bitcode/metadata-2.ll
+++ b/test/Bitcode/metadata-2.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-as < %s | llvm-dis -disable-output
+; RUN: verify-uselistorder < %s
 	%0 = type { %object.ModuleInfo.__vtbl*, i8*, %"byte[]", %1, %"ClassInfo[]", i32, void ()*, void ()*, void ()*, i8*, void ()* }		; type %0
 	%1 = type { i64, %object.ModuleInfo* }		; type %1
 	%2 = type { i32, void ()* }		; type %2
diff --git a/test/Bitcode/metadata.ll b/test/Bitcode/metadata.ll
index fc8a622..955b48b 100644
--- a/test/Bitcode/metadata.ll
+++ b/test/Bitcode/metadata.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-as < %s | llvm-dis -disable-output
+; RUN: verify-uselistorder < %s
 
 !llvm.foo = !{!0}
 !0 = metadata !{i32 42}
diff --git a/test/Bitcode/miscInstructions.3.2.ll b/test/Bitcode/miscInstructions.3.2.ll
index bceae20..6a077d5 100644
--- a/test/Bitcode/miscInstructions.3.2.ll
+++ b/test/Bitcode/miscInstructions.3.2.ll
@@ -1,126 +1,186 @@
-; RUN:  llvm-dis < %s.bc| FileCheck %s
-
-; miscInstructions.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
-; The test checks that LLVM does not misread miscellaneous instructions of
-; older bitcode files.
-
-define void @icmp(i32 %x1, i32 %x2, i32* %ptr1, i32* %ptr2, <2 x i32> %vec1, <2 x i32> %vec2){
-entry:
-; CHECK: %res1 = icmp eq i32 %x1, %x2
-  %res1 = icmp eq i32 %x1, %x2
-  
-; CHECK-NEXT: %res2 = icmp ne i32 %x1, %x2
-  %res2 = icmp ne i32 %x1, %x2
-  
-; CHECK-NEXT: %res3 = icmp ugt i32 %x1, %x2
-  %res3 = icmp ugt i32 %x1, %x2
-  
-; CHECK-NEXT: %res4 = icmp uge i32 %x1, %x2
-  %res4 = icmp uge i32 %x1, %x2
-  
-; CHECK-NEXT: %res5 = icmp ult i32 %x1, %x2
-  %res5 = icmp ult i32 %x1, %x2
-  
-; CHECK-NEXT: %res6 = icmp ule i32 %x1, %x2
-  %res6 = icmp ule i32 %x1, %x2
-  
-; CHECK-NEXT: %res7 = icmp sgt i32 %x1, %x2
-  %res7 = icmp sgt i32 %x1, %x2
-  
-; CHECK-NEXT: %res8 = icmp sge i32 %x1, %x2
-  %res8 = icmp sge i32 %x1, %x2
-  
-; CHECK-NEXT: %res9 = icmp slt i32 %x1, %x2
-  %res9 = icmp slt i32 %x1, %x2
-  
-; CHECK-NEXT: %res10 = icmp sle i32 %x1, %x2
-  %res10 = icmp sle i32 %x1, %x2
-  
-; CHECK-NEXT: %res11 = icmp eq i32* %ptr1, %ptr2
-  %res11 = icmp eq i32* %ptr1, %ptr2
-  
-; CHECK-NEXT: %res12 = icmp eq <2 x i32> %vec1, %vec2
-  %res12 = icmp eq <2 x i32> %vec1, %vec2
-  
-  ret void
-}
-
-
-define void @fcmp(float %x1, float %x2, <2 x float> %vec1, <2 x float> %vec2){
-entry:
-; CHECK: %res1 = fcmp oeq float %x1, %x2
-  %res1 = fcmp oeq float %x1, %x2
-  
-; CHECK-NEXT: %res2 = fcmp one float %x1, %x2
-  %res2 = fcmp one float %x1, %x2
-  
-; CHECK-NEXT: %res3 = fcmp ugt float %x1, %x2
-  %res3 = fcmp ugt float %x1, %x2
-  
-; CHECK-NEXT: %res4 = fcmp uge float %x1, %x2
-  %res4 = fcmp uge float %x1, %x2
-  
-; CHECK-NEXT: %res5 = fcmp ult float %x1, %x2
-  %res5 = fcmp ult float %x1, %x2
-  
-; CHECK-NEXT: %res6 = fcmp ule float %x1, %x2
-  %res6 = fcmp ule float %x1, %x2
-  
-; CHECK-NEXT: %res7 = fcmp ogt float %x1, %x2
-  %res7 = fcmp ogt float %x1, %x2
-  
-; CHECK-NEXT: %res8 = fcmp oge float %x1, %x2
-  %res8 = fcmp oge float %x1, %x2
-  
-; CHECK-NEXT: %res9 = fcmp olt float %x1, %x2
-  %res9 = fcmp olt float %x1, %x2
-  
-; CHECK-NEXT: %res10 = fcmp ole float %x1, %x2
-  %res10 = fcmp ole float %x1, %x2
-  
-; CHECK-NEXT: %res11 = fcmp ord float %x1, %x2
-  %res11 = fcmp ord float %x1, %x2
-  
-; CHECK-NEXT: %res12 = fcmp ueq float %x1, %x2
-  %res12 = fcmp ueq float %x1, %x2
-  
-; CHECK-NEXT: %res13 = fcmp une float %x1, %x2
-  %res13 = fcmp une float %x1, %x2
-  
-; CHECK-NEXT: %res14 = fcmp uno float %x1, %x2
-  %res14 = fcmp uno float %x1, %x2
-  
-; CHECK-NEXT: %res15 = fcmp true float %x1, %x2
-  %res15 = fcmp true float %x1, %x2
-  
-; CHECK-NEXT: %res16 = fcmp false float %x1, %x2
-  %res16 = fcmp false float %x1, %x2
-  
-; CHECK-NEXT: %res17 = fcmp oeq <2 x float> %vec1, %vec2
-  %res17 = fcmp oeq <2 x float> %vec1, %vec2
-  
-  ret void
-}
-
-declare i32 @printf(i8* noalias nocapture, ...)
-
-define void @call(i32 %x, i8* %msg ){
-entry:
-
-; CHECK: %res1 = call i32 @test(i32 %x)
-  %res1 = call i32 @test(i32 %x)
-  
-; CHECK-NEXT: %res2 = tail call i32 @test(i32 %x)
-  %res2 = tail call i32 @test(i32 %x)
-  
-; CHECK-NEXT: %res3 = call i32 (i8*, ...)* @printf(i8* %msg, i32 12, i8 42)
-  %res3 = call i32 (i8*, ...)* @printf(i8* %msg, i32 12, i8 42)
-  
-  ret void
-}
-
-define i32 @test(i32 %x){
-entry:
-
-  ret i32 %x
-}
+; RUN:  llvm-dis < %s.bc| FileCheck %s
+
+; miscInstructions.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
+; The test checks that LLVM does not misread miscellaneous instructions of
+; older bitcode files.
+
+@X = global i8 1
+@_ZTIi = global i8* @X 
+@_ZTId = global i8* @X 
+
+define i32 @__gxx_personality_v0(...){
+entry:
+  ret i32 0
+}
+
+define void @landingpadInstr1(i1 %cond1, <2 x i1> %cond2, <2 x i8> %x1, <2 x i8> %x2){
+entry:
+; CHECK: %res = landingpad { i8*, i32 } personality i32 (...)* @__gxx_personality_v0
+  %res = landingpad { i8*, i32 } personality i32 (...)* @__gxx_personality_v0 
+; CHECK: catch i8** @_ZTIi
+  catch i8** @_ZTIi
+  ret void
+}
+
+define void @landingpadInstr2(i1 %cond1, <2 x i1> %cond2, <2 x i8> %x1, <2 x i8> %x2){
+entry:
+; CHECK: %res = landingpad { i8*, i32 } personality i32 (...)* @__gxx_personality_v0
+  %res = landingpad { i8*, i32 } personality i32 (...)* @__gxx_personality_v0
+; CHECK: cleanup
+  cleanup
+  ret void
+}
+
+define void @landingpadInstr3(i1 %cond1, <2 x i1> %cond2, <2 x i8> %x1, <2 x i8> %x2){
+entry:
+; CHECK: %res = landingpad { i8*, i32 } personality i32 (...)* @__gxx_personality_v0 
+  %res = landingpad { i8*, i32 } personality i32 (...)* @__gxx_personality_v0
+; CHECK: catch i8** @_ZTIi
+  catch i8** @_ZTIi
+; CHECK: filter [1 x i8**] [i8** @_ZTId]
+  filter [1 x i8**] [i8** @_ZTId]
+  ret void
+}
+
+define void @phiInstr(){
+LoopHeader: 
+  %x = add i32 0, 0
+  br label %Loop
+Loop:
+; CHECK:  %indvar = phi i32 [ 0, %LoopHeader ], [ %nextindvar, %Loop ]
+  %indvar = phi i32 [ 0, %LoopHeader ], [ %nextindvar, %Loop ]
+  %nextindvar = add i32 %indvar, 1
+  br label %Loop
+  ret void
+}
+
+define void @selectInstr(i1 %cond1, <2 x i1> %cond2, <2 x i8> %x1, <2 x i8> %x2){
+entry:
+; CHECK: %res1 = select i1 %cond1, i8 1, i8 0 
+  %res1 = select i1 %cond1, i8 1, i8 0
+; CHECK-NEXT: %res2 = select <2 x i1> %cond2, <2 x i8> %x1, <2 x i8> %x2
+  %res2 = select <2 x i1> %cond2, <2 x i8> %x1, <2 x i8> %x2
+
+  ret void
+}
+
+define void @icmp(i32 %x1, i32 %x2, i32* %ptr1, i32* %ptr2, <2 x i32> %vec1, <2 x i32> %vec2){
+entry:
+; CHECK: %res1 = icmp eq i32 %x1, %x2
+  %res1 = icmp eq i32 %x1, %x2
+  
+; CHECK-NEXT: %res2 = icmp ne i32 %x1, %x2
+  %res2 = icmp ne i32 %x1, %x2
+  
+; CHECK-NEXT: %res3 = icmp ugt i32 %x1, %x2
+  %res3 = icmp ugt i32 %x1, %x2
+  
+; CHECK-NEXT: %res4 = icmp uge i32 %x1, %x2
+  %res4 = icmp uge i32 %x1, %x2
+  
+; CHECK-NEXT: %res5 = icmp ult i32 %x1, %x2
+  %res5 = icmp ult i32 %x1, %x2
+  
+; CHECK-NEXT: %res6 = icmp ule i32 %x1, %x2
+  %res6 = icmp ule i32 %x1, %x2
+  
+; CHECK-NEXT: %res7 = icmp sgt i32 %x1, %x2
+  %res7 = icmp sgt i32 %x1, %x2
+  
+; CHECK-NEXT: %res8 = icmp sge i32 %x1, %x2
+  %res8 = icmp sge i32 %x1, %x2
+  
+; CHECK-NEXT: %res9 = icmp slt i32 %x1, %x2
+  %res9 = icmp slt i32 %x1, %x2
+  
+; CHECK-NEXT: %res10 = icmp sle i32 %x1, %x2
+  %res10 = icmp sle i32 %x1, %x2
+  
+; CHECK-NEXT: %res11 = icmp eq i32* %ptr1, %ptr2
+  %res11 = icmp eq i32* %ptr1, %ptr2
+  
+; CHECK-NEXT: %res12 = icmp eq <2 x i32> %vec1, %vec2
+  %res12 = icmp eq <2 x i32> %vec1, %vec2
+  
+  ret void
+}
+
+
+define void @fcmp(float %x1, float %x2, <2 x float> %vec1, <2 x float> %vec2){
+entry:
+; CHECK: %res1 = fcmp oeq float %x1, %x2
+  %res1 = fcmp oeq float %x1, %x2
+  
+; CHECK-NEXT: %res2 = fcmp one float %x1, %x2
+  %res2 = fcmp one float %x1, %x2
+  
+; CHECK-NEXT: %res3 = fcmp ugt float %x1, %x2
+  %res3 = fcmp ugt float %x1, %x2
+  
+; CHECK-NEXT: %res4 = fcmp uge float %x1, %x2
+  %res4 = fcmp uge float %x1, %x2
+  
+; CHECK-NEXT: %res5 = fcmp ult float %x1, %x2
+  %res5 = fcmp ult float %x1, %x2
+  
+; CHECK-NEXT: %res6 = fcmp ule float %x1, %x2
+  %res6 = fcmp ule float %x1, %x2
+  
+; CHECK-NEXT: %res7 = fcmp ogt float %x1, %x2
+  %res7 = fcmp ogt float %x1, %x2
+  
+; CHECK-NEXT: %res8 = fcmp oge float %x1, %x2
+  %res8 = fcmp oge float %x1, %x2
+  
+; CHECK-NEXT: %res9 = fcmp olt float %x1, %x2
+  %res9 = fcmp olt float %x1, %x2
+  
+; CHECK-NEXT: %res10 = fcmp ole float %x1, %x2
+  %res10 = fcmp ole float %x1, %x2
+  
+; CHECK-NEXT: %res11 = fcmp ord float %x1, %x2
+  %res11 = fcmp ord float %x1, %x2
+  
+; CHECK-NEXT: %res12 = fcmp ueq float %x1, %x2
+  %res12 = fcmp ueq float %x1, %x2
+  
+; CHECK-NEXT: %res13 = fcmp une float %x1, %x2
+  %res13 = fcmp une float %x1, %x2
+  
+; CHECK-NEXT: %res14 = fcmp uno float %x1, %x2
+  %res14 = fcmp uno float %x1, %x2
+  
+; CHECK-NEXT: %res15 = fcmp true float %x1, %x2
+  %res15 = fcmp true float %x1, %x2
+  
+; CHECK-NEXT: %res16 = fcmp false float %x1, %x2
+  %res16 = fcmp false float %x1, %x2
+  
+; CHECK-NEXT: %res17 = fcmp oeq <2 x float> %vec1, %vec2
+  %res17 = fcmp oeq <2 x float> %vec1, %vec2
+  
+  ret void
+}
+
+declare i32 @printf(i8* noalias nocapture, ...)
+
+define void @call(i32 %x, i8* %msg ){
+entry:
+
+; CHECK: %res1 = call i32 @test(i32 %x)
+  %res1 = call i32 @test(i32 %x)
+  
+; CHECK-NEXT: %res2 = tail call i32 @test(i32 %x)
+  %res2 = tail call i32 @test(i32 %x)
+  
+; CHECK-NEXT: %res3 = call i32 (i8*, ...)* @printf(i8* %msg, i32 12, i8 42)
+  %res3 = call i32 (i8*, ...)* @printf(i8* %msg, i32 12, i8 42)
+  
+  ret void
+}
+
+define i32 @test(i32 %x){
+entry:
+
+  ret i32 %x
+}
diff --git a/test/Bitcode/miscInstructions.3.2.ll.bc b/test/Bitcode/miscInstructions.3.2.ll.bc
index 9d479b5..ed63d70 100644
--- a/test/Bitcode/miscInstructions.3.2.ll.bc
+++ b/test/Bitcode/miscInstructions.3.2.ll.bc
diff --git a/test/Bitcode/old-aliases.ll b/test/Bitcode/old-aliases.ll
index 7a0eea2..b73b1a9 100644
--- a/test/Bitcode/old-aliases.ll
+++ b/test/Bitcode/old-aliases.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-dis < %s.bc | FileCheck %s
+; RUN: verify-uselistorder < %s.bc
 
 ; old-aliases.bc consist of this file assembled with an old llvm-as (3.5 trunk)
 ; from when aliases contained a ConstantExpr.
diff --git a/test/Bitcode/ptest-new.ll b/test/Bitcode/ptest-new.ll
index 735cc9c..c17ddc9 100644
--- a/test/Bitcode/ptest-new.ll
+++ b/test/Bitcode/ptest-new.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+; RUN: verify-uselistorder < %s
 
 define i32 @foo(<2 x i64> %bar) nounwind {
 entry:
diff --git a/test/Bitcode/ptest-old.ll b/test/Bitcode/ptest-old.ll
index fbe962f..c1e1cae 100644
--- a/test/Bitcode/ptest-old.ll
+++ b/test/Bitcode/ptest-old.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+; RUN: verify-uselistorder < %s
 
 define i32 @foo(<4 x float> %bar) nounwind {
 entry:
diff --git a/test/Bitcode/select.ll b/test/Bitcode/select.ll
index 08a3061..3ad0679 100644
--- a/test/Bitcode/select.ll
+++ b/test/Bitcode/select.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+; RUN: verify-uselistorder < %s
 
 define <2 x i32> @main() {
   ret <2 x i32> select (<2 x i1> <i1 false, i1 undef>, <2 x i32> zeroinitializer, <2 x i32> <i32 0, i32 undef>)
diff --git a/test/Bitcode/shuffle.ll b/test/Bitcode/shuffle.ll
index 1495d8e..b84641c 100644
--- a/test/Bitcode/shuffle.ll
+++ b/test/Bitcode/shuffle.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-as < %s | llvm-dis -disable-output
+; RUN: verify-uselistorder < %s
 
 ; <rdar://problem/8622574>
 ; tests the bitcodereader can handle the case where the reader will initially
diff --git a/test/Bitcode/ssse3_palignr.ll b/test/Bitcode/ssse3_palignr.ll
index 90b4394..8254513 100644
--- a/test/Bitcode/ssse3_palignr.ll
+++ b/test/Bitcode/ssse3_palignr.ll
@@ -1,4 +1,5 @@
 ; RUN: opt < %s -S | FileCheck %s
+; RUN: verify-uselistorder < %s
 ; CHECK-NOT: {@llvm\\.palign}
 
 define <4 x i32> @align1(<4 x i32> %a, <4 x i32> %b) nounwind readnone ssp {
diff --git a/test/Bitcode/standardCIntrinsic.3.2.ll b/test/Bitcode/standardCIntrinsic.3.2.ll
new file mode 100644
index 0000000..09f2378
--- /dev/null
+++ b/test/Bitcode/standardCIntrinsic.3.2.ll
@@ -0,0 +1,16 @@
+; RUN:  llvm-dis < %s.bc| FileCheck %s
+
+; standardCIntrinsic.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
+; The test checks that LLVM does not misread standard C library intrinsic functions
+; of older bitcode files.
+
+define void @memcpyintrinsic(i8* %dest, i8* %src, i32 %len) {
+entry:
+
+; CHECK: call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 %len, i32 1, i1 true)
+  call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 %len, i32 1, i1 true)
+  
+  ret void
+}
+
+declare void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 %len, i32 %align, i1 %isvolatile)
+\ No newline at end of file
diff --git a/test/Bitcode/standardCIntrinsic.3.2.ll.bc b/test/Bitcode/standardCIntrinsic.3.2.ll.bc
new file mode 100644
index 0000000..3ffb1af
--- /dev/null
+++ b/test/Bitcode/standardCIntrinsic.3.2.ll.bc
diff --git a/test/Bitcode/tailcall.ll b/test/Bitcode/tailcall.ll
index 765b470..01190d7 100644
--- a/test/Bitcode/tailcall.ll
+++ b/test/Bitcode/tailcall.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+; RUN: verify-uselistorder < %s
 
 ; Check that musttail and tail roundtrip.
 
diff --git a/test/Bitcode/terminatorInstructions.3.2.ll b/test/Bitcode/terminatorInstructions.3.2.ll
index 31e7896..ba0f5ad 100644
--- a/test/Bitcode/terminatorInstructions.3.2.ll
+++ b/test/Bitcode/terminatorInstructions.3.2.ll
@@ -1,47 +1,76 @@
-; RUN:  llvm-dis < %s.bc| FileCheck %s
-
-; TerminatorOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
-; The test checks that LLVM does not misread terminator instructions from
-; older bitcode files.
-
-define i32 @condbr(i1 %cond){
-entry:
-; CHECK: br i1 %cond, label %TrueLabel, label %FalseLabel
-  br i1 %cond, label %TrueLabel, label %FalseLabel
-  
-  TrueLabel:
-  ret i32 1
-  
-  FalseLabel:
-  ret i32 0
-}
-
-define i32 @uncondbr(){
-entry:
-; CHECK: br label %uncondLabel
-  br label %uncondLabel
-  
-  uncondLabel:
-  ret i32 1
-}
-
-define i32 @indirectbr(i8* %Addr){
-entry:
-; CHECK: indirectbr i8* %Addr, [label %bb1, label %bb2]
-  indirectbr i8* %Addr, [ label %bb1, label %bb2 ]
-  
-  bb1:
-  ret i32 1
-  
-  bb2:
-  ret i32 0
-}
-
-define void @unreachable(){
-entry:
-; CHECK: unreachable
-  unreachable
-  
-  ret void
-}
-
+; RUN:  llvm-dis < %s.bc| FileCheck %s
+
+; TerminatorOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
+; The test checks that LLVM does not misread terminator instructions from
+; older bitcode files.
+
+define i32 @condbr(i1 %cond){
+entry:
+; CHECK: br i1 %cond, label %TrueLabel, label %FalseLabel
+  br i1 %cond, label %TrueLabel, label %FalseLabel
+  
+  TrueLabel:
+  ret i32 1
+  
+  FalseLabel:
+  ret i32 0
+}
+
+define i32 @uncondbr(){
+entry:
+; CHECK: br label %uncondLabel
+  br label %uncondLabel
+  
+  uncondLabel:
+  ret i32 1
+}
+
+define i32 @indirectbr(i8* %Addr){
+entry:
+; CHECK: indirectbr i8* %Addr, [label %bb1, label %bb2]
+  indirectbr i8* %Addr, [ label %bb1, label %bb2 ]
+  
+  bb1:
+  ret i32 1
+  
+  bb2:
+  ret i32 0
+}
+
+define void @unreachable(){
+entry:
+; CHECK: unreachable
+  unreachable
+  
+  ret void
+}
+
+define i32 @retInstr(){
+entry:
+; CHECK: ret i32 1 
+  ret i32 1 
+}
+
+define void @retInstr2(){
+entry:
+; CHECK: ret void 
+  ret void
+}
+
+define i32 @switchInstr(i32 %x){
+entry:
+; CHECK: switch i32 %x, label %label3 [
+  switch i32 %x, label %label3 [
+; CHECK-NEXT: i32 1, label %label1   
+  i32 1, label %label1
+; CHECK-NEXT: i32 2, label %label2  
+  i32 2, label %label2
+  ]
+label1:
+  ret i32 1
+label2:
+  ret i32 2
+label3:
+  ret i32 0
+}
+
diff --git a/test/Bitcode/terminatorInstructions.3.2.ll.bc b/test/Bitcode/terminatorInstructions.3.2.ll.bc
index 9d92ead..0fbc319 100644
--- a/test/Bitcode/terminatorInstructions.3.2.ll.bc
+++ b/test/Bitcode/terminatorInstructions.3.2.ll.bc
diff --git a/test/Bitcode/upgrade-global-ctors.ll b/test/Bitcode/upgrade-global-ctors.ll
index bd253a8..d7afcdd 100644
--- a/test/Bitcode/upgrade-global-ctors.ll
+++ b/test/Bitcode/upgrade-global-ctors.ll
@@ -1,3 +1,5 @@
 ; RUN:  llvm-dis < %s.bc| FileCheck %s
+; RUN:  verify-uselistorder < %s.bc
 
-; CHECK: @llvm.global_ctors = appending global [0 x { i32, void ()*, i8* }] zeroinitializer
+; Global constructors should no longer be upgraded when reading bitcode.
+; CHECK: @llvm.global_ctors = appending global [0 x { i32, void ()* }] zeroinitializer
diff --git a/test/Bitcode/upgrade-loop-metadata.ll b/test/Bitcode/upgrade-loop-metadata.ll
index 1a45056..cebc583 100644
--- a/test/Bitcode/upgrade-loop-metadata.ll
+++ b/test/Bitcode/upgrade-loop-metadata.ll
@@ -1,6 +1,7 @@
 ; Test to make sure loop vectorizer metadata is automatically upgraded.
 ;
 ; RUN: llvm-dis < %s.bc | FileCheck %s
+; RUN: verify-uselistorder < %s.bc
 
 define void @_Z28loop_with_vectorize_metadatav() {
 entry:
@@ -26,7 +27,7 @@ for.end:                                          ; preds = %for.cond
   ret void
 }
 
-; CHECK: !{metadata !"llvm.loop.vectorize.unroll", i32 4}
+; CHECK: !{metadata !"llvm.loop.interleave.count", i32 4}
 ; CHECK: !{metadata !"llvm.loop.vectorize.width", i32 8}
 ; CHECK: !{metadata !"llvm.loop.vectorize.enable", i1 true}
 
diff --git a/test/Bitcode/upgrade-tbaa.ll b/test/Bitcode/upgrade-tbaa.ll
index e738909..23b4d7d 100644
--- a/test/Bitcode/upgrade-tbaa.ll
+++ b/test/Bitcode/upgrade-tbaa.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+; RUN: verify-uselistorder < %s
 
 ; Function Attrs: nounwind
 define void @_Z4testPiPf(i32* nocapture %pI, float* nocapture %pF) #0 {
diff --git a/test/Bitcode/use-list-order.ll b/test/Bitcode/use-list-order.ll
new file mode 100644
index 0000000..6617b9c5
--- /dev/null
+++ b/test/Bitcode/use-list-order.ll
@@ -0,0 +1,168 @@
+; RUN: verify-uselistorder < %s
+
+@a = global [4 x i1] [i1 0, i1 1, i1 0, i1 1]
+@b = alias i1* getelementptr ([4 x i1]* @a, i64 0, i64 2)
+
+; Check use-list order of constants used by globals.
+@glob1 = global i5 7
+@glob2 = global i5 7
+@glob3 = global i5 7
+
+; Check use-list order between variables and aliases.
+@target = global i3 zeroinitializer
+@alias1 = alias i3* @target
+@alias2 = alias i3* @target
+@alias3 = alias i3* @target
+@var1 = global i3* @target
+@var2 = global i3* @target
+@var3 = global i3* @target
+
+; Check use-list order for a global when used both by a global and in a
+; function.
+@globalAndFunction = global i4 4
+@globalAndFunctionGlobalUser = global i4* @globalAndFunction
+
+; Check use-list order for constants used by globals that are themselves used
+; as aliases.  This confirms that this globals are recognized as GlobalValues
+; (not general constants).
+@const.global = global i63 0
+@const.global.ptr = global i63* @const.global
+@const.global.2 = global i63 0
+
+; Same as above, but for aliases.
+@const.target = global i62 1
+@const.alias = alias i62* @const.target
+@const.alias.ptr = alias i62* @const.alias
+@const.alias.2 = alias i62* @const.target
+
+define i64 @f(i64 %f) {
+entry:
+  %sum = add i64 %f, 0
+  ret i64 %sum
+}
+
+define i64 @g(i64 %g) {
+entry:
+  %sum = add i64 %g, 0
+  ret i64 %sum
+}
+
+define i64 @h(i64 %h) {
+entry:
+  %sum = add i64 %h, 0
+  ret i64 %sum
+}
+
+define i64 @i(i64 %i) {
+entry:
+  %sum = add i64 %i, 1
+  ret i64 %sum
+}
+
+define i64 @j(i64 %j) {
+entry:
+  %sum = add i64 %j, 1
+  ret i64 %sum
+}
+
+define i64 @k(i64 %k) {
+entry:
+  %sum = add i64 %k, 1
+  ret i64 %sum
+}
+
+define i64 @l(i64 %l) {
+entry:
+  %sum = add i64 %l, 1
+  ret i64 %sum
+}
+
+define i1 @loadb() {
+entry:
+  %b = load i1* @b
+  ret i1 %b
+}
+
+define i1 @loada() {
+entry:
+  %a = load i1* getelementptr ([4 x i1]* @a, i64 0, i64 2)
+  ret i1 %a
+}
+
+define i32 @f32(i32 %a, i32 %b, i32 %c, i32 %d) {
+entry:
+  br label %first
+
+second:
+  %eh = mul i32 %e, %h
+  %sum = add i32 %eh, %ef
+  br label %exit
+
+exit:
+  %product = phi i32 [%ef, %first], [%sum, %second]
+  ret i32 %product
+
+first:
+  %e = add i32 %a, 7
+  %f = add i32 %b, 7
+  %g = add i32 %c, 8
+  %h = add i32 %d, 8
+  %ef = mul i32 %e, %f
+  %gh = mul i32 %g, %h
+  %gotosecond = icmp slt i32 %gh, -9
+  br i1 %gotosecond, label %second, label %exit
+}
+
+define i4 @globalAndFunctionFunctionUser() {
+entry:
+  %local = load i4* @globalAndFunction
+  ret i4 %local
+}
+
+; Check for when an instruction is its own user.
+define void @selfUser(i1 %a) {
+entry:
+  ret void
+
+loop1:
+  br label %loop2
+
+loop2:
+  %var = phi i32 [ %var, %loop1 ], [ %var, %loop2 ]
+  br label %loop2
+}
+
+; Check that block addresses work.
+@ba1 = constant i8* blockaddress (@bafunc1, %bb)
+@ba2 = constant i8* getelementptr (i8* blockaddress (@bafunc2, %bb), i61 0)
+@ba3 = constant i8* getelementptr (i8* blockaddress (@bafunc2, %bb), i61 0)
+
+define i8* @babefore() {
+  ret i8* getelementptr (i8* blockaddress (@bafunc2, %bb), i61 0)
+bb1:
+  ret i8* blockaddress (@bafunc1, %bb)
+bb2:
+  ret i8* blockaddress (@bafunc3, %bb)
+}
+define void @bafunc1() {
+  unreachable
+bb:
+  unreachable
+}
+define void @bafunc2() {
+  unreachable
+bb:
+  unreachable
+}
+define void @bafunc3() {
+  unreachable
+bb:
+  unreachable
+}
+define i8* @baafter() {
+  ret i8* blockaddress (@bafunc2, %bb)
+bb1:
+  ret i8* blockaddress (@bafunc1, %bb)
+bb2:
+  ret i8* blockaddress (@bafunc3, %bb)
+}
diff --git a/test/Bitcode/variableArgumentIntrinsic.3.2.ll b/test/Bitcode/variableArgumentIntrinsic.3.2.ll
index 35fe0e2..ad70f05 100644
--- a/test/Bitcode/variableArgumentIntrinsic.3.2.ll
+++ b/test/Bitcode/variableArgumentIntrinsic.3.2.ll
@@ -1,33 +1,34 @@
-; RUN:  llvm-dis < %s.bc| FileCheck %s
-
-; vaArgIntrinsic.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
-; The test checks that LLVM does not misread variable argument intrinsic instructions
-; of older bitcode files.
-
-define i32 @varArgIntrinsic(i32 %X, ...) {
-
-  %ap = alloca i8*
-  %ap2 = bitcast i8** %ap to i8*
-  
-; CHECK: call void @llvm.va_start(i8* %ap2)
-  call void @llvm.va_start(i8* %ap2)
-
-; CHECK-NEXT: %tmp = va_arg i8** %ap, i32
-  %tmp = va_arg i8** %ap, i32
-
-  %aq = alloca i8*
-  %aq2 = bitcast i8** %aq to i8*
-  
-; CHECK: call void @llvm.va_copy(i8* %aq2, i8* %ap2)
-  call void @llvm.va_copy(i8* %aq2, i8* %ap2)
-; CHECK-NEXT: call void @llvm.va_end(i8* %aq2)
-  call void @llvm.va_end(i8* %aq2)
-
-; CHECK-NEXT:  call void @llvm.va_end(i8* %ap2)
-  call void @llvm.va_end(i8* %ap2)
-  ret i32 %tmp
-}
-
-declare void @llvm.va_start(i8*)
-declare void @llvm.va_copy(i8*, i8*)
-declare void @llvm.va_end(i8*)
-\ No newline at end of file
+; RUN: llvm-dis < %s.bc| FileCheck %s
+; RUN: verify-uselistorder < %s.bc
+
+; vaArgIntrinsic.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
+; The test checks that LLVM does not misread variable argument intrinsic instructions
+; of older bitcode files.
+
+define i32 @varArgIntrinsic(i32 %X, ...) {
+
+  %ap = alloca i8*
+  %ap2 = bitcast i8** %ap to i8*
+
+; CHECK: call void @llvm.va_start(i8* %ap2)
+  call void @llvm.va_start(i8* %ap2)
+
+; CHECK-NEXT: %tmp = va_arg i8** %ap, i32
+  %tmp = va_arg i8** %ap, i32
+
+  %aq = alloca i8*
+  %aq2 = bitcast i8** %aq to i8*
+
+; CHECK: call void @llvm.va_copy(i8* %aq2, i8* %ap2)
+  call void @llvm.va_copy(i8* %aq2, i8* %ap2)
+; CHECK-NEXT: call void @llvm.va_end(i8* %aq2)
+  call void @llvm.va_end(i8* %aq2)
+
+; CHECK-NEXT:  call void @llvm.va_end(i8* %ap2)
+  call void @llvm.va_end(i8* %ap2)
+  ret i32 %tmp
+}
+
+declare void @llvm.va_start(i8*)
+declare void @llvm.va_copy(i8*, i8*)
+declare void @llvm.va_end(i8*)
diff --git a/test/Bitcode/vectorInstructions.3.2.ll b/test/Bitcode/vectorInstructions.3.2.ll
index b24ef75..94c193a 100644
--- a/test/Bitcode/vectorInstructions.3.2.ll
+++ b/test/Bitcode/vectorInstructions.3.2.ll
@@ -1,34 +1,33 @@
-; RUN:  llvm-dis < %s.bc| FileCheck %s
-
-; vectorOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
-; The test checks that LLVM does not misread vector operations of
-; older bitcode files.
-
-define void @extractelement(<2 x i8> %x1){
-entry:
-; CHECK: %res1 = extractelement <2 x i8> %x1, i32 0
-  %res1 = extractelement <2 x i8> %x1, i32 0
-  
-  ret void
-}
-
-define void @insertelement(<2 x i8> %x1){
-entry:
-; CHECK: %res1 = insertelement <2 x i8> %x1, i8 0, i32 0
-  %res1 = insertelement <2 x i8> %x1, i8 0, i32 0
-  
-  ret void
-}
-
-define void @shufflevector(<2 x i8> %x1){
-entry:
-; CHECK: %res1 = shufflevector <2 x i8> %x1, <2 x i8> %x1, <2 x i32> <i32 0, i32 1>
-  %res1 = shufflevector <2 x i8> %x1, <2 x i8> %x1, <2 x i32> <i32 0, i32 1>
-
-; CHECK-NEXT: %res2 = shufflevector <2 x i8> %x1, <2 x i8> undef, <2 x i32> <i32 0, i32 1>
-  %res2 = shufflevector <2 x i8> %x1, <2 x i8> undef, <2 x i32> <i32 0, i32 1>
-  
-  ret void
-}
-
-
+; RUN: llvm-dis < %s.bc| FileCheck %s
+; RUN: verify-uselistorder < %s.bc
+
+; vectorOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
+; The test checks that LLVM does not misread vector operations of
+; older bitcode files.
+
+define void @extractelement(<2 x i8> %x1){
+entry:
+; CHECK: %res1 = extractelement <2 x i8> %x1, i32 0
+  %res1 = extractelement <2 x i8> %x1, i32 0
+
+  ret void
+}
+
+define void @insertelement(<2 x i8> %x1){
+entry:
+; CHECK: %res1 = insertelement <2 x i8> %x1, i8 0, i32 0
+  %res1 = insertelement <2 x i8> %x1, i8 0, i32 0
+
+  ret void
+}
+
+define void @shufflevector(<2 x i8> %x1){
+entry:
+; CHECK: %res1 = shufflevector <2 x i8> %x1, <2 x i8> %x1, <2 x i32> <i32 0, i32 1>
+  %res1 = shufflevector <2 x i8> %x1, <2 x i8> %x1, <2 x i32> <i32 0, i32 1>
+
+; CHECK-NEXT: %res2 = shufflevector <2 x i8> %x1, <2 x i8> undef, <2 x i32> <i32 0, i32 1>
+  %res2 = shufflevector <2 x i8> %x1, <2 x i8> undef, <2 x i32> <i32 0, i32 1>
+
+  ret void
+}
diff --git a/test/Bitcode/visibility-styles.3.2.ll b/test/Bitcode/visibility-styles.3.2.ll
index ec2ee68..e36c0e0 100644
--- a/test/Bitcode/visibility-styles.3.2.ll
+++ b/test/Bitcode/visibility-styles.3.2.ll
@@ -1,4 +1,5 @@
 ; RUN:  llvm-dis < %s.bc| FileCheck %s
+; RUN:  verify-uselistorder < %s.bc
 
 ; visibility-styles.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
 ; The test checks that LLVM does not silently misread visibility styles of
diff --git a/test/Bitcode/weak-cmpxchg-upgrade.ll b/test/Bitcode/weak-cmpxchg-upgrade.ll
index dbcd150..76b857b 100644
--- a/test/Bitcode/weak-cmpxchg-upgrade.ll
+++ b/test/Bitcode/weak-cmpxchg-upgrade.ll
@@ -1,4 +1,5 @@
 ; RUN: llvm-dis < %s.bc | FileCheck %s
+; RUN: verify-uselistorder < %s.bc
 
 ; cmpxchg-upgrade.ll.bc was produced by running a version of llvm-as from just
 ; before the IR change on this file.
author	Stephen Hines <srhines@google.com>	2014-12-01 14:51:49 -0800
committer	Stephen Hines <srhines@google.com>	2014-12-02 16:08:10 -0800
commit	37ed9c199ca639565f6ce88105f9e39e898d82d0 (patch)
tree	8fb36d3910e3ee4c4e1b7422f4f017108efc52f5 /test/Bitcode
parent	d2327b22152ced7bc46dc629fc908959e8a52d03 (diff)
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