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| author | Pirama Arumuga Nainar <pirama@google.com> | 2015-05-06 11:46:36 -0700 |
|---|---|---|
| committer | Pirama Arumuga Nainar <pirama@google.com> | 2015-05-18 10:52:30 -0700 |
| commit | 2c3e0051c31c3f5b2328b447eadf1cf9c4427442 (patch) | |
| tree | c0104029af14e9f47c2ef58ca60e6137691f3c9b /test/CodeGen/AArch64/addsub.ll | |
| parent | e1bc145815f4334641be19f1c45ecf85d25b6e5a (diff) | |
| download | external_llvm-2c3e0051c31c3f5b2328b447eadf1cf9c4427442.zip external_llvm-2c3e0051c31c3f5b2328b447eadf1cf9c4427442.tar.gz external_llvm-2c3e0051c31c3f5b2328b447eadf1cf9c4427442.tar.bz2 | |
Update aosp/master LLVM for rebase to r235153
Change-Id: I9bf53792f9fc30570e81a8d80d296c681d005ea7
(cherry picked from commit 0c7f116bb6950ef819323d855415b2f2b0aad987)
Diffstat (limited to 'test/CodeGen/AArch64/addsub.ll')
| -rw-r--r-- | test/CodeGen/AArch64/addsub.ll | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/test/CodeGen/AArch64/addsub.ll b/test/CodeGen/AArch64/addsub.ll index 09b9f62..d6350a6 100644 --- a/test/CodeGen/AArch64/addsub.ll +++ b/test/CodeGen/AArch64/addsub.ll @@ -24,6 +24,34 @@ define void @add_small() { ret void } +; Make sure we grab the imm variant when the register operand +; can be implicitly zero-extend. +; We used to generate something horrible like this: +; wA = ldrb +; xB = ldimm 12 +; xC = add xB, wA, uxtb +; whereas this can be achieved with: +; wA = ldrb +; xC = add xA, #12 ; <- xA implicitly zero extend wA. +define void @add_small_imm(i8* %p, i64* %q, i32 %b, i32* %addr) { +; CHECK-LABEL: add_small_imm: +entry: + +; CHECK: ldrb w[[LOAD32:[0-9]+]], [x0] + %t = load i8, i8* %p + %promoted = zext i8 %t to i64 + %zextt = zext i8 %t to i32 + %add = add nuw i32 %zextt, %b + +; CHECK: add [[ADD2:x[0-9]+]], x[[LOAD32]], #12 + %add2 = add nuw i64 %promoted, 12 + store i32 %add, i32* %addr + +; CHECK: str [[ADD2]], [x1] + store i64 %add2, i64* %q + ret void +} + ; Add 12-bit immediates, shifted left by 12 bits define void @add_med() { ; CHECK-LABEL: add_med: |