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authorPirama Arumuga Nainar <pirama@google.com>2015-04-10 22:08:18 +0000
committerAndroid Git Automerger <android-git-automerger@android.com>2015-04-10 22:08:18 +0000
commit13a7db5b9c4f5e543d037be68ec3428216bfd550 (patch)
tree1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/CodeGen/AArch64/arm64-abi-varargs.ll
parent0eb46f5d1e06a4284663d636a74b06adc3a161d7 (diff)
parent31195f0bdca6ee2a5e72d07edf13e1d81206d949 (diff)
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am 31195f0b: Merge "Update aosp/master llvm for rebase to r233350"
* commit '31195f0bdca6ee2a5e72d07edf13e1d81206d949': Update aosp/master llvm for rebase to r233350
Diffstat (limited to 'test/CodeGen/AArch64/arm64-abi-varargs.ll')
-rw-r--r--test/CodeGen/AArch64/arm64-abi-varargs.ll42
1 files changed, 21 insertions, 21 deletions
diff --git a/test/CodeGen/AArch64/arm64-abi-varargs.ll b/test/CodeGen/AArch64/arm64-abi-varargs.ll
index 92db392..f95fec6 100644
--- a/test/CodeGen/AArch64/arm64-abi-varargs.ll
+++ b/test/CodeGen/AArch64/arm64-abi-varargs.ll
@@ -82,18 +82,18 @@ define i32 @main() nounwind ssp {
store i32 10, i32* %a10, align 4
store i32 11, i32* %a11, align 4
store i32 12, i32* %a12, align 4
- %1 = load i32* %a1, align 4
- %2 = load i32* %a2, align 4
- %3 = load i32* %a3, align 4
- %4 = load i32* %a4, align 4
- %5 = load i32* %a5, align 4
- %6 = load i32* %a6, align 4
- %7 = load i32* %a7, align 4
- %8 = load i32* %a8, align 4
- %9 = load i32* %a9, align 4
- %10 = load i32* %a10, align 4
- %11 = load i32* %a11, align 4
- %12 = load i32* %a12, align 4
+ %1 = load i32, i32* %a1, align 4
+ %2 = load i32, i32* %a2, align 4
+ %3 = load i32, i32* %a3, align 4
+ %4 = load i32, i32* %a4, align 4
+ %5 = load i32, i32* %a5, align 4
+ %6 = load i32, i32* %a6, align 4
+ %7 = load i32, i32* %a7, align 4
+ %8 = load i32, i32* %a8, align 4
+ %9 = load i32, i32* %a9, align 4
+ %10 = load i32, i32* %a10, align 4
+ %11 = load i32, i32* %a11, align 4
+ %12 = load i32, i32* %a12, align 4
call void (i32, i32, i32, i32, i32, i32, i32, i32, i32, ...)* @fn9(i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, i32 %8, i32 %9, i32 %10, i32 %11, i32 %12)
ret i32 0
}
@@ -131,9 +131,9 @@ entry:
%y.addr = alloca <4 x i32>, align 16
store i32 %x, i32* %x.addr, align 4
store <4 x i32> %y, <4 x i32>* %y.addr, align 16
- %0 = load i32* %x.addr, align 4
- %1 = load <4 x i32>* %y.addr, align 16
- call void (i8*, ...)* @foo(i8* getelementptr inbounds ([4 x i8]* @.str, i32 0, i32 0), i32 %0, <4 x i32> %1)
+ %0 = load i32, i32* %x.addr, align 4
+ %1 = load <4 x i32>, <4 x i32>* %y.addr, align 16
+ call void (i8*, ...)* @foo(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i32 0, i32 0), i32 %0, <4 x i32> %1)
ret void
}
@@ -158,12 +158,12 @@ entry:
call void @llvm.va_start(i8* %args1)
%0 = va_arg i8** %args, i32
store i32 %0, i32* %vc, align 4
- %ap.cur = load i8** %args
- %1 = getelementptr i8* %ap.cur, i32 15
+ %ap.cur = load i8*, i8** %args
+ %1 = getelementptr i8, i8* %ap.cur, i32 15
%2 = ptrtoint i8* %1 to i64
%3 = and i64 %2, -16
%ap.align = inttoptr i64 %3 to i8*
- %ap.next = getelementptr i8* %ap.align, i32 16
+ %ap.next = getelementptr i8, i8* %ap.align, i32 16
store i8* %ap.next, i8** %args
%4 = bitcast i8* %ap.align to %struct.s41*
%5 = bitcast %struct.s41* %vs to i8*
@@ -183,9 +183,9 @@ entry:
store i32 %x, i32* %x.addr, align 4
%0 = bitcast %struct.s41* %s41 to i128*
store i128 %s41.coerce, i128* %0, align 1
- %1 = load i32* %x.addr, align 4
+ %1 = load i32, i32* %x.addr, align 4
%2 = bitcast %struct.s41* %s41 to i128*
- %3 = load i128* %2, align 1
- call void (i8*, ...)* @foo2(i8* getelementptr inbounds ([4 x i8]* @.str, i32 0, i32 0), i32 %1, i128 %3)
+ %3 = load i128, i128* %2, align 1
+ call void (i8*, ...)* @foo2(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i32 0, i32 0), i32 %1, i128 %3)
ret void
}