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| author | Pirama Arumuga Nainar <pirama@google.com> | 2015-05-20 12:55:36 -0700 |
|---|---|---|
| committer | Pirama Arumuga Nainar <pirama@google.com> | 2015-05-26 14:28:33 -0700 |
| commit | 560a17f4e3f8019a108abb7848a4735c59a43be0 (patch) | |
| tree | 89b942fa3484ef229429f490a5e8219e741af0d1 /test/CodeGen/AArch64/arm64-convert-v4f64.ll | |
| parent | 2c3e0051c31c3f5b2328b447eadf1cf9c4427442 (diff) | |
| download | external_llvm-560a17f4e3f8019a108abb7848a4735c59a43be0.zip external_llvm-560a17f4e3f8019a108abb7848a4735c59a43be0.tar.gz external_llvm-560a17f4e3f8019a108abb7848a4735c59a43be0.tar.bz2 | |
Update aosp/master LLVM with patches for fp16
Cherry-pick LLVM revisions r235191, r235215, r235220, r235341, r235363,
r235530, r235609, r235610, r237004
r235191 has a required bug-fix and the rest are all related to fp16.
Change-Id: I7fe8da5ffd8f2c06150885a54769abd18c3a04c6
(cherry picked from commit a18e6af1712fd41c4a705a19ad71f6e9ac7a4e68)
Diffstat (limited to 'test/CodeGen/AArch64/arm64-convert-v4f64.ll')
| -rw-r--r-- | test/CodeGen/AArch64/arm64-convert-v4f64.ll | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/test/CodeGen/AArch64/arm64-convert-v4f64.ll b/test/CodeGen/AArch64/arm64-convert-v4f64.ll index c4e3e4e..b8da399 100644 --- a/test/CodeGen/AArch64/arm64-convert-v4f64.ll +++ b/test/CodeGen/AArch64/arm64-convert-v4f64.ll @@ -31,3 +31,36 @@ define <8 x i8> @fptosi_v4f64_to_v4i8(<8 x double>* %ptr) { ret <8 x i8> %tmp2 } +define <4 x half> @uitofp_v4i64_to_v4f16(<4 x i64>* %ptr) { +; CHECK: uitofp_v4i64_to_v4f16 +; CHECK-DAG: ucvtf v[[LHS:[0-9]+]].2d, v0.2d +; CHECK-DAG: ucvtf v[[RHS:[0-9]+]].2d, v1.2d +; CHECK-DAG: fcvtn v[[MID:[0-9]+]].2s, v[[LHS]].2d +; CHECK-DAG: fcvtn2 v[[MID]].4s, v[[RHS]].2d +; CHECK: fcvtn v0.4h, v[[MID]].4s + %tmp1 = load <4 x i64>, <4 x i64>* %ptr + %tmp2 = uitofp <4 x i64> %tmp1 to <4 x half> + ret <4 x half> %tmp2 +} + +define <4 x i16> @trunc_v4i64_to_v4i16(<4 x i64>* %ptr) { +; CHECK: trunc_v4i64_to_v4i16 +; CHECK: xtn +; CHECK: xtn2 +; CHECK: xtn + %tmp1 = load <4 x i64>, <4 x i64>* %ptr + %tmp2 = trunc <4 x i64> %tmp1 to <4 x i16> + ret <4 x i16> %tmp2 +} + +define <4 x i16> @fptoui_v4f64_to_v4i16(<4 x double>* %ptr) { +; CHECK: fptoui_v4f64_to_v4i16 +; CHECK-DAG: fcvtzu v[[LHS:[0-9]+]].2d, v0.2d +; CHECK-DAG: fcvtzu v[[RHS:[0-9]+]].2d, v1.2d +; CHECK-DAG: xtn v[[MID:[0-9]+]].2s, v[[LHS]].2d +; CHECK-DAG: xtn2 v[[MID]].4s, v[[RHS]].2d +; CHECK: xtn v0.4h, v[[MID]].4s + %tmp1 = load <4 x double>, <4 x double>* %ptr + %tmp2 = fptoui <4 x double> %tmp1 to <4 x i16> + ret <4 x i16> %tmp2 +} |